[X86][SSE] Relax use limits for lowerAddSubToHorizontalOp (PR32433)
Now that we can use HADD/SUB for scalar additions from any pair of extracted elements (D61263), we can relax the one use limit as we will be able to merge multiple uses into using the same HADD/SUB op. This exposes a couple of missed opportunities in LowerBuildVectorv4x32 which will be committed separately. Differential Revision: https://reviews.llvm.org/D61782 llvm-svn: 360594
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@ -19033,16 +19033,11 @@ static SDValue lowerAddSubToHorizontalOp(SDValue Op, SelectionDAG &DAG,
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if (!IsFP && !Subtarget.hasSSSE3())
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return Op;
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// Defer forming the minimal horizontal op if the vector source has more than
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// the 2 extract element uses that we're matching here. In that case, we might
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// form a horizontal op that includes more than 1 add/sub op.
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// Extract from a common vector.
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if (LHS.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
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RHS.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
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LHS.getOperand(0) != RHS.getOperand(0) ||
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!LHS.getOperand(0)->hasNUsesOfValue(2, 0))
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return Op;
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if (!isa<ConstantSDNode>(LHS.getOperand(1)) ||
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!isa<ConstantSDNode>(LHS.getOperand(1)) ||
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!isa<ConstantSDNode>(RHS.getOperand(1)) ||
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!shouldUseHorizontalOp(true, DAG, Subtarget))
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return Op;
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@ -186,27 +186,39 @@ define <4 x float> @test7_undef(<4 x float> %a, <4 x float> %b) {
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}
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define <4 x float> @test8_undef(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: test8_undef:
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; SSE: # %bb.0:
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; SSE-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; SSE-NEXT: addss %xmm0, %xmm1
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; SSE-NEXT: movaps %xmm0, %xmm2
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; SSE-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; SSE-NEXT: addss %xmm2, %xmm0
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; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: retq
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; SSE-SLOW-LABEL: test8_undef:
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; SSE-SLOW: # %bb.0:
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; SSE-SLOW-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; SSE-SLOW-NEXT: addss %xmm0, %xmm1
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; SSE-SLOW-NEXT: movaps %xmm0, %xmm2
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; SSE-SLOW-NEXT: unpckhpd {{.*#+}} xmm2 = xmm2[1],xmm0[1]
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; SSE-SLOW-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; SSE-SLOW-NEXT: addss %xmm2, %xmm0
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; SSE-SLOW-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
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; SSE-SLOW-NEXT: movaps %xmm1, %xmm0
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; SSE-SLOW-NEXT: retq
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;
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; AVX-LABEL: test8_undef:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm1
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; AVX-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; AVX-NEXT: vaddss %xmm0, %xmm2, %xmm0
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
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; AVX-NEXT: retq
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; SSE-FAST-LABEL: test8_undef:
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; SSE-FAST: # %bb.0:
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; SSE-FAST-NEXT: haddps %xmm0, %xmm0
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; SSE-FAST-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; SSE-FAST-NEXT: retq
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;
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; AVX-SLOW-LABEL: test8_undef:
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; AVX-SLOW: # %bb.0:
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; AVX-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm1
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; AVX-SLOW-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; AVX-SLOW-NEXT: vaddss %xmm0, %xmm2, %xmm0
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; AVX-SLOW-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
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; AVX-SLOW-NEXT: retq
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;
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; AVX-FAST-LABEL: test8_undef:
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; AVX-FAST-NEXT: retq
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%vecext = extractelement <4 x float> %a, i32 0
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%vecext1 = extractelement <4 x float> %a, i32 1
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%add = fadd float %vecext, %vecext1
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@ -355,29 +367,29 @@ define <16 x float> @test13_v16f32_undef(<16 x float> %a, <16 x float> %b) {
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; AVX1-SLOW-NEXT: vhaddps %xmm1, %xmm0, %xmm0
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; AVX1-SLOW-NEXT: retq
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;
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; AVX1-FAST-LABEL: test13_v16f32_undef:
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; AVX1-FAST: # %bb.0:
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; AVX1-FAST-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-FAST-NEXT: vhaddps %xmm1, %xmm0, %xmm0
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; AVX1-FAST-NEXT: retq
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; AVX-FAST-LABEL: test13_v16f32_undef:
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX-FAST-NEXT: vhaddps %xmm1, %xmm0, %xmm0
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; AVX-FAST-NEXT: retq
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;
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; AVX512-LABEL: test13_v16f32_undef:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX512-NEXT: vaddss %xmm1, %xmm0, %xmm1
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; AVX512-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX512-NEXT: vpermilps {{.*#+}} xmm3 = xmm0[3,1,2,3]
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; AVX512-NEXT: vaddss %xmm3, %xmm2, %xmm2
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; AVX512-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
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; AVX512-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX512-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX512-NEXT: vaddss %xmm2, %xmm0, %xmm2
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; AVX512-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3]
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; AVX512-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX512-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; AVX512-NEXT: vaddss %xmm0, %xmm2, %xmm0
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; AVX512-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
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; AVX512-NEXT: retq
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; AVX512-SLOW-LABEL: test13_v16f32_undef:
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; AVX512-SLOW: # %bb.0:
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; AVX512-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX512-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm1
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; AVX512-SLOW-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX512-SLOW-NEXT: vpermilps {{.*#+}} xmm3 = xmm0[3,1,2,3]
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; AVX512-SLOW-NEXT: vaddss %xmm3, %xmm2, %xmm2
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; AVX512-SLOW-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
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; AVX512-SLOW-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX512-SLOW-NEXT: vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; AVX512-SLOW-NEXT: vaddss %xmm2, %xmm0, %xmm2
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; AVX512-SLOW-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3]
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; AVX512-SLOW-NEXT: vpermilpd {{.*#+}} xmm2 = xmm0[1,0]
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; AVX512-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; AVX512-SLOW-NEXT: vaddss %xmm0, %xmm2, %xmm0
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; AVX512-SLOW-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
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; AVX512-SLOW-NEXT: retq
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%vecext = extractelement <16 x float> %a, i32 0
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%vecext1 = extractelement <16 x float> %a, i32 1
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%add1 = fadd float %vecext, %vecext1
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@ -160,10 +160,26 @@ define <16 x i32> @test16_v16i32_undef(<16 x i32> %a, <16 x i32> %b) {
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; SSE-NEXT: phaddd %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test16_v16i32_undef:
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; AVX: # %bb.0:
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; AVX-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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; AVX-SLOW-LABEL: test16_v16i32_undef:
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; AVX-SLOW: # %bb.0:
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; AVX-SLOW-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX-SLOW-NEXT: retq
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;
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; AVX1-FAST-LABEL: test16_v16i32_undef:
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; AVX1-FAST: # %bb.0:
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; AVX1-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX1-FAST-NEXT: retq
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;
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; AVX2-FAST-LABEL: test16_v16i32_undef:
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; AVX2-FAST: # %bb.0:
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; AVX2-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX2-FAST-NEXT: retq
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;
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; AVX512-FAST-LABEL: test16_v16i32_undef:
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; AVX512-FAST: # %bb.0:
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; AVX512-FAST-NEXT: vphaddd %xmm0, %xmm0, %xmm0
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; AVX512-FAST-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
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; AVX512-FAST-NEXT: retq
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%vecext = extractelement <16 x i32> %a, i32 0
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%vecext1 = extractelement <16 x i32> %a, i32 1
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%add = add i32 %vecext, %vecext1
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