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Make sure this DAGCombine actually returns an UNDEF of the correct type; PR10476. 

llvm-svn: 135993
This commit is contained in:
Eli Friedman 2011-07-25 22:25:42 +00:00
parent 49993f26bf
commit cbd3ba91b7
2 changed files with 19 additions and 3 deletions
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2
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -6896,7 +6896,7 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
// If Idx was -1 above, Elt is going to be -1, so just return undef. // If Idx was -1 above, Elt is going to be -1, so just return undef.
if (Elt == -1) if (Elt == -1)
return DAG.getUNDEF(LN0->getBasePtr().getValueType()); return DAG.getUNDEF(LVT);
unsigned Align = LN0->getAlignment(); unsigned Align = LN0->getAlignment();
if (NewLoad) { if (NewLoad) {

20
llvm/test/CodeGen/X86/extractelement-load.ll
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@ -1,9 +1,25 @@
; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | not grep movd ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | FileCheck %s
; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | not grep movd ; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | FileCheck %s
define i32 @t(<2 x i64>* %val) nounwind { define i32 @t(<2 x i64>* %val) nounwind {
; CHECK: t:
; CHECK-NOT: movd
; CHECK: movl 8(
; CHECK-NEXT: ret
%tmp2 = load <2 x i64>* %val, align 16 ; <<2 x i64>> [#uses=1] %tmp2 = load <2 x i64>* %val, align 16 ; <<2 x i64>> [#uses=1]
%tmp3 = bitcast <2 x i64> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1] %tmp3 = bitcast <2 x i64> %tmp2 to <4 x i32> ; <<4 x i32>> [#uses=1]
%tmp4 = extractelement <4 x i32> %tmp3, i32 2 ; <i32> [#uses=1] %tmp4 = extractelement <4 x i32> %tmp3, i32 2 ; <i32> [#uses=1]
ret i32 %tmp4 ret i32 %tmp4
} }
; Case where extractelement of load ends up as undef.
; (Making sure this doesn't crash.)
define i32 @t2(<8 x i32>* %xp) {
; CHECK: t2:
; CHECK: ret
%x = load <8 x i32>* %xp
%Shuff68 = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32
undef, i32 7, i32 9, i32 undef, i32 13, i32 15, i32 1, i32 3>
%y = extractelement <8 x i32> %Shuff68, i32 0
ret i32 %y
}