[X86] Remove leftover semicolons at end of macros
This was missed in a few places in SVN r333613, causing compilation errors if these macros are used e.g. as parameter to a function. llvm-svn: 333734
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@ -2226,13 +2226,13 @@ _mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) {
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(__m512)__builtin_ia32_subps512_mask((__v16sf)(__m512)(A), \
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(__v16sf)(__m512)(B), \
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(__v16sf)(__m512)(W), (__mmask16)(U), \
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(int)(R));
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(int)(R))
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#define _mm512_maskz_sub_round_ps(U, A, B, R) \
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(__m512)__builtin_ia32_subps512_mask((__v16sf)(__m512)(A), \
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(__v16sf)(__m512)(B), \
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(__v16sf)_mm512_setzero_ps(), \
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(__mmask16)(U), (int)(R));
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(__mmask16)(U), (int)(R))
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_mask_mul_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
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@ -2361,13 +2361,13 @@ _mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) {
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(__m512)__builtin_ia32_mulps512_mask((__v16sf)(__m512)(A), \
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(__v16sf)(__m512)(B), \
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(__v16sf)(__m512)(W), (__mmask16)(U), \
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(int)(R));
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(int)(R))
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#define _mm512_maskz_mul_round_ps(U, A, B, R) \
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(__m512)__builtin_ia32_mulps512_mask((__v16sf)(__m512)(A), \
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(__v16sf)(__m512)(B), \
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(__v16sf)_mm512_setzero_ps(), \
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(__mmask16)(U), (int)(R));
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(__mmask16)(U), (int)(R))
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_mask_div_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
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@ -2509,13 +2509,13 @@ _mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) {
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(__m512)__builtin_ia32_divps512_mask((__v16sf)(__m512)(A), \
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(__v16sf)(__m512)(B), \
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(__v16sf)(__m512)(W), (__mmask16)(U), \
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(int)(R));
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(int)(R))
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#define _mm512_maskz_div_round_ps(U, A, B, R) \
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(__m512)__builtin_ia32_divps512_mask((__v16sf)(__m512)(A), \
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(__v16sf)(__m512)(B), \
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(__v16sf)_mm512_setzero_ps(), \
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(__mmask16)(U), (int)(R));
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(__mmask16)(U), (int)(R))
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#define _mm512_roundscale_ps(A, B) \
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(__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(A), (int)(B), \
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@ -79,7 +79,7 @@ _cvtsh_ss(unsigned short __a)
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/// \returns The converted 16-bit half-precision float value.
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#define _cvtss_sh(a, imm) \
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(unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \
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(imm)))[0]);
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(imm)))[0])
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/// Converts a 128-bit vector containing 32-bit float values into a
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/// 128-bit vector containing 16-bit half-precision float values.
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@ -105,7 +105,7 @@ _cvtsh_ss(unsigned short __a)
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/// values. The lower 64 bits are used to store the converted 16-bit
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/// half-precision floating-point values.
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#define _mm_cvtps_ph(a, imm) \
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(__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm));
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(__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm))
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/// Converts a 128-bit vector containing 16-bit half-precision float
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/// values into a 128-bit vector containing 32-bit float values.
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@ -148,7 +148,7 @@ _mm_cvtph_ps(__m128i __a)
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/// \returns A 128-bit vector containing the converted 16-bit half-precision
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/// float values.
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#define _mm256_cvtps_ph(a, imm) \
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(__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm));
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(__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm))
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/// Converts a 128-bit vector containing 16-bit half-precision float
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/// values into a 256-bit vector of [8 x float].
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@ -57,7 +57,7 @@
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#define _mm256_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \
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(__m256i)_mm256_mask_gf2p8affineinv_epi64_epi8((__m256i)_mm256_setzero_si256(), \
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U, A, B, I);
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U, A, B, I)
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#define _mm512_gf2p8affineinv_epi64_epi8(A, B, I) \
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@ -32,7 +32,7 @@
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sha")))
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#define _mm_sha1rnds4_epu32(V1, V2, M) \
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__builtin_ia32_sha1rnds4((__v4si)(__m128i)(V1), (__v4si)(__m128i)(V2), (M));
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__builtin_ia32_sha1rnds4((__v4si)(__m128i)(V1), (__v4si)(__m128i)(V2), (M))
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static __inline__ __m128i __DEFAULT_FN_ATTRS
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_mm_sha1nexte_epu32(__m128i __X, __m128i __Y)
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@ -31,12 +31,12 @@
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#define _mm256_clmulepi64_epi128(A, B, I) \
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(__m256i)__builtin_ia32_pclmulqdq256((__v4di)(__m256i)(A), \
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(__v4di)(__m256i)(B), \
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(char)(I));
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(char)(I))
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#define _mm512_clmulepi64_epi128(A, B, I) \
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(__m512i)__builtin_ia32_pclmulqdq512((__v8di)(__m512i)(A), \
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(__v8di)(__m512i)(B), \
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(char)(I));
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(char)(I))
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#endif /* __VPCLMULQDQINTRIN_H */
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