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[Hexagon] Add REQUIRES: asserts to test/CodeGen/Hexagon/v6vec_inc1.ll 

llvm-svn: 327907
This commit is contained in:
Krzysztof Parzyszek 2018-03-19 21:05:21 +00:00
parent 1d2bd15821
commit c76fefc6de
1 changed files with 1 additions and 0 deletions
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llvm/test/CodeGen/Hexagon/v6vec_inc1.ll
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@ -1,5 +1,6 @@
; RUN: llc -march=hexagon -O2 -enable-pipeliner=false < %s | FileCheck %s
; RUN: llc -march=hexagon -O2 -debug-only=pipeliner < %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-SWP
; REQUIRES: asserts
; CHECK: {
; CHECK-DAG: v{{[0-9]*}} = vmem(r{{[0-9]*}}++#1)