[PredicateInfo] Replace pointer comparisons with deterministic compares.
Currently there are a few pointer comparisons in ValueDFS_Compare, which can cause non-deterministic ordering when materializing values. There are 2 cases this patch fixes: 1. Order defs before uses used to compare pointers, which guarantees defs before uses, but causes non-deterministic ordering between 2 uses or 2 defs, depending on the allocation order. By converting the pointers to booleans, we can circumvent that problem. 2. comparePHIRelated was comparing the basic block pointers of edges, which also results in a non-deterministic order and is also not really meaningful for ordering. By ordering by their destination DFS numbers we guarantee a deterministic order. For the example below, we can end up with 2 different uselist orderings, when running `opt -mem2reg -ipsccp` hundreds of times. Because the non-determinism is caused by allocation ordering, we cannot reproduce it with ipsccp alone. declare i32 @hoge() local_unnamed_addr #0 define dso_local i32 @ham(i8* %arg, i8* %arg1) #0 { bb: %tmp = alloca i32 %tmp2 = alloca i32, align 4 br label %bb19 bb4: ; preds = %bb20 br label %bb6 bb6: ; preds = %bb4 %tmp7 = call i32 @hoge() store i32 %tmp7, i32* %tmp %tmp8 = load i32, i32* %tmp %tmp9 = icmp eq i32 %tmp8, 912730082 %tmp10 = load i32, i32* %tmp br i1 %tmp9, label %bb11, label %bb16 bb11: ; preds = %bb6 unreachable bb13: ; preds = %bb20 br label %bb14 bb14: ; preds = %bb13 %tmp15 = load i32, i32* %tmp br label %bb16 bb16: ; preds = %bb14, %bb6 %tmp17 = phi i32 [ %tmp10, %bb6 ], [ 0, %bb14 ] br label %bb19 bb18: ; preds = %bb20 unreachable bb19: ; preds = %bb16, %bb br label %bb20 bb20: ; preds = %bb19 indirectbr i8* null, [label %bb4, label %bb13, label %bb18] } Reviewers: davide, efriedma Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D64866 llvm-svn: 367049
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@ -125,8 +125,10 @@ static bool valueComesBefore(OrderedInstructions &OI, const Value *A,
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// necessary to compare uses/defs in the same block. Doing so allows us to walk
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// necessary to compare uses/defs in the same block. Doing so allows us to walk
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// the minimum number of instructions necessary to compute our def/use ordering.
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// the minimum number of instructions necessary to compute our def/use ordering.
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struct ValueDFS_Compare {
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struct ValueDFS_Compare {
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DominatorTree &DT;
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OrderedInstructions &OI;
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OrderedInstructions &OI;
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ValueDFS_Compare(OrderedInstructions &OI) : OI(OI) {}
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ValueDFS_Compare(DominatorTree &DT, OrderedInstructions &OI)
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: DT(DT), OI(OI) {}
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bool operator()(const ValueDFS &A, const ValueDFS &B) const {
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bool operator()(const ValueDFS &A, const ValueDFS &B) const {
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if (&A == &B)
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if (&A == &B)
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@ -136,7 +138,9 @@ struct ValueDFS_Compare {
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// comesbefore to see what the real ordering is, because they are in the
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// comesbefore to see what the real ordering is, because they are in the
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// same basic block.
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// same basic block.
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bool SameBlock = std::tie(A.DFSIn, A.DFSOut) == std::tie(B.DFSIn, B.DFSOut);
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assert((A.DFSIn != B.DFSIn || A.DFSOut == B.DFSOut) &&
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"Equal DFS-in numbers imply equal out numbers");
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bool SameBlock = A.DFSIn == B.DFSIn;
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// We want to put the def that will get used for a given set of phi uses,
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// We want to put the def that will get used for a given set of phi uses,
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// before those phi uses.
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// before those phi uses.
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@ -145,9 +149,11 @@ struct ValueDFS_Compare {
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if (SameBlock && A.LocalNum == LN_Last && B.LocalNum == LN_Last)
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if (SameBlock && A.LocalNum == LN_Last && B.LocalNum == LN_Last)
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return comparePHIRelated(A, B);
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return comparePHIRelated(A, B);
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bool isADef = A.Def;
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bool isBDef = B.Def;
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if (!SameBlock || A.LocalNum != LN_Middle || B.LocalNum != LN_Middle)
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if (!SameBlock || A.LocalNum != LN_Middle || B.LocalNum != LN_Middle)
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return std::tie(A.DFSIn, A.DFSOut, A.LocalNum, A.Def, A.U) <
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return std::tie(A.DFSIn, A.LocalNum, isADef) <
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std::tie(B.DFSIn, B.DFSOut, B.LocalNum, B.Def, B.U);
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std::tie(B.DFSIn, B.LocalNum, isBDef);
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return localComesBefore(A, B);
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return localComesBefore(A, B);
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}
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}
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@ -164,10 +170,35 @@ struct ValueDFS_Compare {
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// For two phi related values, return the ordering.
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// For two phi related values, return the ordering.
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bool comparePHIRelated(const ValueDFS &A, const ValueDFS &B) const {
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bool comparePHIRelated(const ValueDFS &A, const ValueDFS &B) const {
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auto &ABlockEdge = getBlockEdge(A);
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BasicBlock *ASrc, *ADest, *BSrc, *BDest;
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auto &BBlockEdge = getBlockEdge(B);
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std::tie(ASrc, ADest) = getBlockEdge(A);
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// Now sort by block edge and then defs before uses.
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std::tie(BSrc, BDest) = getBlockEdge(B);
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return std::tie(ABlockEdge, A.Def, A.U) < std::tie(BBlockEdge, B.Def, B.U);
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#ifndef NDEBUG
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// This function should only be used for values in the same BB, check that.
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DomTreeNode *DomASrc = DT.getNode(ASrc);
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DomTreeNode *DomBSrc = DT.getNode(BSrc);
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assert(DomASrc->getDFSNumIn() == (unsigned)A.DFSIn &&
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"DFS numbers for A should match the ones of the source block");
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assert(DomBSrc->getDFSNumIn() == (unsigned)B.DFSIn &&
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"DFS numbers for B should match the ones of the source block");
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assert(A.DFSIn == B.DFSIn && "Values must be in the same block");
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#endif
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(void)ASrc;
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(void)BSrc;
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// Use DFS numbers to compare destination blocks, to guarantee a
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// deterministic order.
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DomTreeNode *DomADest = DT.getNode(ADest);
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DomTreeNode *DomBDest = DT.getNode(BDest);
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unsigned AIn = DomADest->getDFSNumIn();
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unsigned BIn = DomBDest->getDFSNumIn();
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bool isADef = A.Def;
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bool isBDef = B.Def;
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assert((!A.Def || !A.U) && (!B.Def || !B.U) &&
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"Def and U cannot be set at the same time");
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// Now sort by edge destination and then defs before uses.
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return std::tie(AIn, isADef) < std::tie(BIn, isBDef);
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}
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}
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// Get the definition of an instruction that occurs in the middle of a block.
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// Get the definition of an instruction that occurs in the middle of a block.
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@ -567,7 +598,7 @@ Value *PredicateInfo::materializeStack(unsigned int &Counter,
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// TODO: Use this algorithm to perform fast single-variable renaming in
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// TODO: Use this algorithm to perform fast single-variable renaming in
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// promotememtoreg and memoryssa.
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// promotememtoreg and memoryssa.
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void PredicateInfo::renameUses(SmallVectorImpl<Value *> &OpsToRename) {
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void PredicateInfo::renameUses(SmallVectorImpl<Value *> &OpsToRename) {
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ValueDFS_Compare Compare(OI);
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ValueDFS_Compare Compare(DT, OI);
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// Compute liveness, and rename in O(uses) per Op.
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// Compute liveness, and rename in O(uses) per Op.
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for (auto *Op : OpsToRename) {
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for (auto *Op : OpsToRename) {
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LLVM_DEBUG(dbgs() << "Visiting " << *Op << "\n");
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LLVM_DEBUG(dbgs() << "Visiting " << *Op << "\n");
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@ -0,0 +1,76 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -ipsccp -S %s | FileCheck %s
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declare i32 @hoge()
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define dso_local i32 @ham(i8* %arg, i8* %arg1) {
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; CHECK-LABEL: @ham(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP:%.*]] = alloca i32
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; CHECK-NEXT: [[TMP2:%.*]] = alloca i32, align 4
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; CHECK-NEXT: br label [[BB19:%.*]]
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; CHECK: bb4:
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; CHECK-NEXT: br label [[BB6:%.*]]
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; CHECK: bb6:
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; CHECK-NEXT: [[TMP7:%.*]] = call i32 @hoge()
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; CHECK-NEXT: store i32 [[TMP7]], i32* [[TMP]]
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; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP]]
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; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 912730082
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; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP]]
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; CHECK-NEXT: br i1 [[TMP9]], label [[BB11:%.*]], label [[BB16:%.*]]
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; CHECK: bb11:
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; CHECK-NEXT: unreachable
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; CHECK: bb13:
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; CHECK-NEXT: br label [[BB14:%.*]]
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; CHECK: bb14:
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; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP]]
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; CHECK-NEXT: br label [[BB16]]
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; CHECK: bb16:
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; CHECK-NEXT: [[TMP17:%.*]] = phi i32 [ [[TMP10]], [[BB6]] ], [ 0, [[BB14]] ]
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; CHECK-NEXT: br label [[BB19]]
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; CHECK: bb18:
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; CHECK-NEXT: unreachable
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; CHECK: bb19:
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; CHECK-NEXT: br label [[BB20:%.*]]
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; CHECK: bb20:
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; CHECK-NEXT: indirectbr i8* null, [label [[BB4:%.*]], label [[BB13:%.*]], label %bb18]
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;
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bb:
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%tmp = alloca i32
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%tmp2 = alloca i32, align 4
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br label %bb19
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bb4: ; preds = %bb20
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br label %bb6
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bb6: ; preds = %bb4
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%tmp7 = call i32 @hoge()
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store i32 %tmp7, i32* %tmp
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%tmp8 = load i32, i32* %tmp
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%tmp9 = icmp eq i32 %tmp8, 912730082
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%tmp10 = load i32, i32* %tmp
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br i1 %tmp9, label %bb11, label %bb16
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bb11: ; preds = %bb6
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unreachable
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bb13: ; preds = %bb20
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br label %bb14
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bb14: ; preds = %bb13
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%tmp15 = load i32, i32* %tmp
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br label %bb16
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bb16: ; preds = %bb14, %bb6
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%tmp17 = phi i32 [ %tmp10, %bb6 ], [ 0, %bb14 ]
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br label %bb19
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bb18: ; preds = %bb20
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unreachable
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bb19: ; preds = %bb16, %bb
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br label %bb20
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bb20: ; preds = %bb19
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indirectbr i8* null, [label %bb4, label %bb13, label %bb18]
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}
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