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Implement AArch64 Neon instruction set Perm. 

llvm-svn: 194124
This commit is contained in:
Jiangning Liu 2013-11-06 03:35:53 +00:00
parent f4226f1d7b
commit c628af66c7
4 changed files with 1174 additions and 0 deletions
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21
clang/include/clang/Basic/arm_neon.td
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@ -59,6 +59,12 @@ def OP_QDMULH_LN : Op;
def OP_QRDMULH_LN : Op;
def OP_FMS_LN : Op;
def OP_FMS_LNQ : Op;
def OP_TRN1 : Op;
def OP_ZIP1 : Op;
def OP_UZP1 : Op;
def OP_TRN2 : Op;
def OP_ZIP2 : Op;
def OP_UZP2 : Op;
def OP_EQ : Op;
def OP_GE : Op;
def OP_LE : Op;
@ -792,6 +798,21 @@ def SHA256H : SInst<"vsha256h", "dddd", "QUi">;
def SHA256H2 : SInst<"vsha256h2", "dddd", "QUi">;
def SHA256SU1 : SInst<"vsha256su1", "dddd", "QUi">;
////////////////////////////////////////////////////////////////////////////////
// Permutation
def VTRN1 : SOpInst<"vtrn1", "ddd",
"csiUcUsUifPcPsQcQsQiQlQUcQUsQUiQUlQfQdQPcQPs", OP_TRN1>;
def VZIP1 : SOpInst<"vzip1", "ddd",
"csiUcUsUifPcPsQcQsQiQlQUcQUsQUiQUlQfQdQPcQPs", OP_ZIP1>;
def VUZP1 : SOpInst<"vuzp1", "ddd",
"csiUcUsUifPcPsQcQsQiQlQUcQUsQUiQUlQfQdQPcQPs", OP_UZP1>;
def VTRN2 : SOpInst<"vtrn2", "ddd",
"csiUcUsUifPcPsQcQsQiQlQUcQUsQUiQUlQfQdQPcQPs", OP_TRN2>;
def VZIP2 : SOpInst<"vzip2", "ddd",
"csiUcUsUifPcPsQcQsQiQlQUcQUsQUiQUlQfQdQPcQPs", OP_ZIP2>;
def VUZP2 : SOpInst<"vuzp2", "ddd",
"csiUcUsUifPcPsQcQsQiQlQUcQUsQUiQUlQfQdQPcQPs", OP_UZP2>;
////////////////////////////////////////////////////////////////////////////////
// Scalar Arithmetic

12
clang/lib/CodeGen/CGBuiltin.cpp
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@ -2497,6 +2497,18 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
// AArch64 builtins mapping to legacy ARM v7 builtins.
// FIXME: the mapped builtins listed correspond to what has been tested
// in aarch64-neon-intrinsics.c so far.
case AArch64::BI__builtin_neon_vuzp_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vuzp_v, E);
case AArch64::BI__builtin_neon_vuzpq_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vuzpq_v, E);
case AArch64::BI__builtin_neon_vzip_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vzip_v, E);
case AArch64::BI__builtin_neon_vzipq_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vzipq_v, E);
case AArch64::BI__builtin_neon_vtrn_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vtrn_v, E);
case AArch64::BI__builtin_neon_vtrnq_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vtrnq_v, E);
case AArch64::BI__builtin_neon_vext_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vext_v, E);
case AArch64::BI__builtin_neon_vextq_v:

1093
clang/test/CodeGen/aarch64-neon-perm.c Normal file
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File diff suppressed because it is too large Load Diff

48
clang/utils/TableGen/NeonEmitter.cpp
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@ -81,6 +81,12 @@ enum OpKind {
OpQRDMulhLane,
OpFMSLane,
OpFMSLaneQ,
OpTrn1,
OpZip1,
OpUzp1,
OpTrn2,
OpZip2,
OpUzp2,
OpEq,
OpGe,
OpLe,
@ -228,6 +234,12 @@ public:
OpMap["OP_QRDMULH_LN"] = OpQRDMulhLane;
OpMap["OP_FMS_LN"] = OpFMSLane;
OpMap["OP_FMS_LNQ"] = OpFMSLaneQ;
OpMap["OP_TRN1"] = OpTrn1;
OpMap["OP_ZIP1"] = OpZip1;
OpMap["OP_UZP1"] = OpUzp1;
OpMap["OP_TRN2"] = OpTrn2;
OpMap["OP_ZIP2"] = OpZip2;
OpMap["OP_UZP2"] = OpUzp2;
OpMap["OP_EQ"] = OpEq;
OpMap["OP_GE"] = OpGe;
OpMap["OP_LE"] = OpLe;
@ -1776,6 +1788,42 @@ static std::string GenOpString(const std::string &name, OpKind op,
s += ");";
break;
}
case OpUzp1:
s += "__builtin_shufflevector(__a, __b";
for (unsigned i = 0; i < nElts; i++)
s += ", " + utostr(2*i);
s += ");";
break;
case OpUzp2:
s += "__builtin_shufflevector(__a, __b";
for (unsigned i = 0; i < nElts; i++)
s += ", " + utostr(2*i+1);
s += ");";
break;
case OpZip1:
s += "__builtin_shufflevector(__a, __b";
for (unsigned i = 0; i < (nElts/2); i++)
s += ", " + utostr(i) + ", " + utostr(i+nElts);
s += ");";
break;
case OpZip2:
s += "__builtin_shufflevector(__a, __b";
for (unsigned i = nElts/2; i < nElts; i++)
s += ", " + utostr(i) + ", " + utostr(i+nElts);
s += ");";
break;
case OpTrn1:
s += "__builtin_shufflevector(__a, __b";
for (unsigned i = 0; i < (nElts/2); i++)
s += ", " + utostr(2*i) + ", " + utostr(2*i+nElts);
s += ");";
break;
case OpTrn2:
s += "__builtin_shufflevector(__a, __b";
for (unsigned i = 0; i < (nElts/2); i++)
s += ", " + utostr(2*i+1) + ", " + utostr(2*i+1+nElts);
s += ");";
break;
case OpAbdl: {
std::string abd = MangleName("vabd", typestr, ClassS) + "(__a, __b)";
if (typestr[0] != 'U') {