[NVPTX] Remove dead code.
I left helpers that look useful for debugging alone. NFC. llvm-svn: 250410
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33ef8acbbd
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c5275bdec1
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@ -41,24 +41,6 @@ enum CondCodes {
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};
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}
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inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) {
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switch (CC) {
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case NVPTXCC::NE:
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return "ne";
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case NVPTXCC::EQ:
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return "eq";
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case NVPTXCC::LT:
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return "lt";
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case NVPTXCC::LE:
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return "le";
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case NVPTXCC::GT:
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return "gt";
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case NVPTXCC::GE:
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return "ge";
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}
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llvm_unreachable("Unknown condition code");
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}
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FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
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llvm::CodeGenOpt::Level OptLevel);
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ModulePass *createNVPTXAssignValidGlobalNamesPass();
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@ -1419,11 +1419,6 @@ void NVPTXAsmPrinter::printParamName(Function::const_arg_iterator I,
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O << "_param_" << paramIndex;
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}
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void NVPTXAsmPrinter::printParamName(int paramIndex, raw_ostream &O) {
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CurrentFnSym->print(O, MAI);
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O << "_param_" << paramIndex;
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}
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void NVPTXAsmPrinter::emitFunctionParamList(const Function *F, raw_ostream &O) {
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const DataLayout &DL = getDataLayout();
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const AttributeSet &PAL = F->getAttributes();
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@ -1951,15 +1946,6 @@ void NVPTXAsmPrinter::bufferAggregateConstant(const Constant *CPV,
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// buildTypeNameMap - Run through symbol table looking for type names.
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//
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bool NVPTXAsmPrinter::isImageType(Type *Ty) {
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std::map<Type *, std::string>::iterator PI = TypeNameMap.find(Ty);
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return PI != TypeNameMap.end() && (!PI->second.compare("struct._image1d_t") ||
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!PI->second.compare("struct._image2d_t") ||
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!PI->second.compare("struct._image3d_t"));
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}
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bool NVPTXAsmPrinter::ignoreLoc(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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@ -212,28 +212,21 @@ private:
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MCOperand GetSymbolRef(const MCSymbol *Symbol);
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unsigned encodeVirtualRegister(unsigned Reg);
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void EmitAlignment(unsigned NumBits, const GlobalValue *GV = nullptr) const {}
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void printVecModifiedImmediate(const MachineOperand &MO, const char *Modifier,
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raw_ostream &O);
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void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
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const char *Modifier = nullptr);
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void printImplicitDef(const MachineInstr *MI, raw_ostream &O) const;
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void printModuleLevelGV(const GlobalVariable *GVar, raw_ostream &O,
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bool = false);
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void printParamName(int paramIndex, raw_ostream &O);
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void printParamName(Function::const_arg_iterator I, int paramIndex,
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raw_ostream &O);
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void emitGlobals(const Module &M);
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void emitHeader(Module &M, raw_ostream &O, const NVPTXSubtarget &STI);
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void emitKernelFunctionDirectives(const Function &F, raw_ostream &O) const;
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void emitVirtualRegister(unsigned int vr, raw_ostream &);
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void emitFunctionExternParamList(const MachineFunction &MF);
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void emitFunctionParamList(const Function *, raw_ostream &O);
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void emitFunctionParamList(const MachineFunction &MF, raw_ostream &O);
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void setAndEmitFunctionVirtualRegisters(const MachineFunction &MF);
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void emitFunctionTempData(const MachineFunction &MF, unsigned &FrameSize);
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bool isImageType(Type *Ty);
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void printReturnValStr(const Function *, raw_ostream &O);
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void printReturnValStr(const MachineFunction &MF, raw_ostream &O);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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@ -288,13 +281,9 @@ private:
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void bufferLEByte(const Constant *CPV, int Bytes, AggBuffer *aggBuffer);
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void bufferAggregateConstant(const Constant *CV, AggBuffer *aggBuffer);
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void printOperandProper(const MachineOperand &MO);
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void emitLinkageDirective(const GlobalValue *V, raw_ostream &O);
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void emitDeclarations(const Module &, raw_ostream &O);
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void emitDeclaration(const Function *, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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void emitDemotedVars(const Function *, raw_ostream &);
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bool lowerImageHandleOperand(const MachineInstr *MI, unsigned OpNo,
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@ -2012,15 +2012,6 @@ SDValue NVPTXTargetLowering::LowerSTOREi1(SDValue Op, SelectionDAG &DAG) const {
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return Result;
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}
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SDValue NVPTXTargetLowering::getExtSymb(SelectionDAG &DAG, const char *inname,
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int idx, EVT v) const {
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std::string *name = nvTM->getManagedStrPool()->getManagedString(inname);
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std::stringstream suffix;
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suffix << idx;
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*name += suffix.str();
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return DAG.getTargetExternalSymbol(name->c_str(), v);
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}
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SDValue
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NVPTXTargetLowering::getParamSymbol(SelectionDAG &DAG, int idx, EVT v) const {
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std::string ParamSym;
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@ -2034,10 +2025,6 @@ NVPTXTargetLowering::getParamSymbol(SelectionDAG &DAG, int idx, EVT v) const {
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return DAG.getTargetExternalSymbol(SavedStr->c_str(), v);
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}
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SDValue NVPTXTargetLowering::getParamHelpSymbol(SelectionDAG &DAG, int idx) {
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return getExtSymb(DAG, ".HLPPARAM", idx);
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}
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// Check to see if the kernel argument is image*_t or sampler_t
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bool llvm::isImageOrSamplerVal(const Value *arg, const Module *context) {
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@ -2550,20 +2537,6 @@ void NVPTXTargetLowering::LowerAsmOperandForConstraint(
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TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
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}
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// NVPTX suuport vector of legal types of any length in Intrinsics because the
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// NVPTX specific type legalizer
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// will legalize them to the PTX supported length.
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bool NVPTXTargetLowering::isTypeSupportedInIntrinsic(MVT VT) const {
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if (isTypeLegal(VT))
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return true;
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if (VT.isVector()) {
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MVT eVT = VT.getVectorElementType();
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if (isTypeLegal(eVT))
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return true;
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}
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return false;
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}
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static unsigned getOpcForTextureInstr(unsigned Intrinsic) {
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switch (Intrinsic) {
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default:
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@ -3823,11 +3796,6 @@ NVPTXTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
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}
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/// getFunctionAlignment - Return the Log2 alignment of this function.
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unsigned NVPTXTargetLowering::getFunctionAlignment(const Function *) const {
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return 4;
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}
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//===----------------------------------------------------------------------===//
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// NVPTX DAG Combining
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//===----------------------------------------------------------------------===//
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@ -441,13 +441,9 @@ public:
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SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerGlobalAddress(const GlobalValue *GV, int64_t Offset,
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SelectionDAG &DAG) const;
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const char *getTargetNodeName(unsigned Opcode) const override;
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bool isTypeSupportedInIntrinsic(MVT VT) const;
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bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
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unsigned Intrinsic) const override;
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@ -467,9 +463,6 @@ public:
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DstTy->getPrimitiveSizeInBits() == 32;
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}
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/// getFunctionAlignment - Return the Log2 alignment of this function.
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unsigned getFunctionAlignment(const Function *F) const;
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EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Ctx,
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EVT VT) const override {
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if (VT.isVector())
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@ -523,11 +516,7 @@ public:
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private:
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const NVPTXSubtarget &STI; // cache the subtarget here
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SDValue getExtSymb(SelectionDAG &DAG, const char *name, int idx,
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EVT = MVT::i32) const;
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SDValue getParamSymbol(SelectionDAG &DAG, int idx, EVT) const;
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SDValue getParamHelpSymbol(SelectionDAG &DAG, int idx);
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SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
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@ -87,27 +87,6 @@ bool NVPTXInstrInfo::isMoveInstr(const MachineInstr &MI, unsigned &SrcReg,
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return false;
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}
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bool NVPTXInstrInfo::isReadSpecialReg(MachineInstr &MI) const {
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switch (MI.getOpcode()) {
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default:
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return false;
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case NVPTX::INT_PTX_SREG_NTID_X:
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case NVPTX::INT_PTX_SREG_NTID_Y:
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case NVPTX::INT_PTX_SREG_NTID_Z:
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case NVPTX::INT_PTX_SREG_TID_X:
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case NVPTX::INT_PTX_SREG_TID_Y:
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case NVPTX::INT_PTX_SREG_TID_Z:
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case NVPTX::INT_PTX_SREG_CTAID_X:
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case NVPTX::INT_PTX_SREG_CTAID_Y:
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case NVPTX::INT_PTX_SREG_CTAID_Z:
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case NVPTX::INT_PTX_SREG_NCTAID_X:
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case NVPTX::INT_PTX_SREG_NCTAID_Y:
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case NVPTX::INT_PTX_SREG_NCTAID_Z:
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case NVPTX::INT_PTX_SREG_WARPSIZE:
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return true;
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}
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}
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bool NVPTXInstrInfo::isLoadInstr(const MachineInstr &MI,
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unsigned &AddrSpace) const {
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bool isLoad = false;
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@ -56,7 +56,6 @@ public:
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unsigned &DestReg) const;
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bool isLoadInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
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bool isStoreInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
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bool isReadSpecialReg(MachineInstr &MI) const;
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virtual bool CanTailMerge(const MachineInstr *MI) const;
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// Branch analysis.
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@ -335,99 +335,6 @@ bool llvm::getAlign(const CallInst &I, unsigned index, unsigned &align) {
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return false;
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}
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bool llvm::isBarrierIntrinsic(Intrinsic::ID id) {
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return (id == Intrinsic::nvvm_barrier0) ||
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(id == Intrinsic::nvvm_barrier0_popc) ||
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(id == Intrinsic::nvvm_barrier0_and) ||
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(id == Intrinsic::nvvm_barrier0_or) ||
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(id == Intrinsic::cuda_syncthreads);
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}
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// Interface for checking all memory space transfer related intrinsics
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bool llvm::isMemorySpaceTransferIntrinsic(Intrinsic::ID id) {
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return id == Intrinsic::nvvm_ptr_local_to_gen ||
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id == Intrinsic::nvvm_ptr_shared_to_gen ||
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id == Intrinsic::nvvm_ptr_global_to_gen ||
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id == Intrinsic::nvvm_ptr_constant_to_gen ||
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id == Intrinsic::nvvm_ptr_gen_to_global ||
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id == Intrinsic::nvvm_ptr_gen_to_shared ||
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id == Intrinsic::nvvm_ptr_gen_to_local ||
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id == Intrinsic::nvvm_ptr_gen_to_constant ||
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id == Intrinsic::nvvm_ptr_gen_to_param;
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}
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// consider several special intrinsics in striping pointer casts, and
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// provide an option to ignore GEP indices for find out the base address only
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// which could be used in simple alias disambiguation.
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const Value *
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llvm::skipPointerTransfer(const Value *V, bool ignore_GEP_indices) {
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V = V->stripPointerCasts();
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while (true) {
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if (const IntrinsicInst *IS = dyn_cast<IntrinsicInst>(V)) {
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if (isMemorySpaceTransferIntrinsic(IS->getIntrinsicID())) {
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V = IS->getArgOperand(0)->stripPointerCasts();
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continue;
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}
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} else if (ignore_GEP_indices)
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if (const GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
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V = GEP->getPointerOperand()->stripPointerCasts();
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continue;
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}
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break;
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}
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return V;
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}
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// consider several special intrinsics in striping pointer casts, and
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// - ignore GEP indices for find out the base address only, and
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// - tracking PHINode
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// which could be used in simple alias disambiguation.
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const Value *
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llvm::skipPointerTransfer(const Value *V, std::set<const Value *> &processed) {
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if (processed.find(V) != processed.end())
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return nullptr;
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processed.insert(V);
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const Value *V2 = V->stripPointerCasts();
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if (V2 != V && processed.find(V2) != processed.end())
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return nullptr;
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processed.insert(V2);
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V = V2;
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while (true) {
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if (const IntrinsicInst *IS = dyn_cast<IntrinsicInst>(V)) {
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if (isMemorySpaceTransferIntrinsic(IS->getIntrinsicID())) {
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V = IS->getArgOperand(0)->stripPointerCasts();
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continue;
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}
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} else if (const GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
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V = GEP->getPointerOperand()->stripPointerCasts();
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continue;
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} else if (const PHINode *PN = dyn_cast<PHINode>(V)) {
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if (V != V2 && processed.find(V) != processed.end())
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return nullptr;
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processed.insert(PN);
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const Value *common = nullptr;
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for (unsigned i = 0; i != PN->getNumIncomingValues(); ++i) {
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const Value *pv = PN->getIncomingValue(i);
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const Value *base = skipPointerTransfer(pv, processed);
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if (base) {
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if (!common)
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common = base;
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else if (common != base)
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return PN;
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}
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}
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if (!common)
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return PN;
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V = common;
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}
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break;
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}
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return V;
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}
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// The following are some useful utilities for debugging
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BasicBlock *llvm::getParentBlock(Value *v) {
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@ -61,27 +61,6 @@ bool isKernelFunction(const llvm::Function &);
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bool getAlign(const llvm::Function &, unsigned index, unsigned &);
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bool getAlign(const llvm::CallInst &, unsigned index, unsigned &);
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bool isBarrierIntrinsic(llvm::Intrinsic::ID);
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/// make_vector - Helper function which is useful for building temporary vectors
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/// to pass into type construction of CallInst ctors. This turns a null
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/// terminated list of pointers (or other value types) into a real live vector.
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///
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template <typename T> inline std::vector<T> make_vector(T A, ...) {
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va_list Args;
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va_start(Args, A);
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std::vector<T> Result;
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Result.push_back(A);
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while (T Val = va_arg(Args, T))
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Result.push_back(Val);
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va_end(Args);
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return Result;
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}
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bool isMemorySpaceTransferIntrinsic(Intrinsic::ID id);
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const Value *skipPointerTransfer(const Value *V, bool ignore_GEP_indices);
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const Value *
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skipPointerTransfer(const Value *V, std::set<const Value *> &processed);
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BasicBlock *getParentBlock(Value *v);
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Function *getParentFunction(Value *v);
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void dumpBlock(Value *v, char *blockName);
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