[NVPTX] Remove dead code.

I left helpers that look useful for debugging alone. NFC.

llvm-svn: 250410
This commit is contained in:
Benjamin Kramer 2015-10-15 14:45:41 +00:00
parent 33ef8acbbd
commit c5275bdec1
9 changed files with 0 additions and 222 deletions

View File

@ -41,24 +41,6 @@ enum CondCodes {
};
}
inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) {
switch (CC) {
case NVPTXCC::NE:
return "ne";
case NVPTXCC::EQ:
return "eq";
case NVPTXCC::LT:
return "lt";
case NVPTXCC::LE:
return "le";
case NVPTXCC::GT:
return "gt";
case NVPTXCC::GE:
return "ge";
}
llvm_unreachable("Unknown condition code");
}
FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
llvm::CodeGenOpt::Level OptLevel);
ModulePass *createNVPTXAssignValidGlobalNamesPass();

View File

@ -1419,11 +1419,6 @@ void NVPTXAsmPrinter::printParamName(Function::const_arg_iterator I,
O << "_param_" << paramIndex;
}
void NVPTXAsmPrinter::printParamName(int paramIndex, raw_ostream &O) {
CurrentFnSym->print(O, MAI);
O << "_param_" << paramIndex;
}
void NVPTXAsmPrinter::emitFunctionParamList(const Function *F, raw_ostream &O) {
const DataLayout &DL = getDataLayout();
const AttributeSet &PAL = F->getAttributes();
@ -1951,15 +1946,6 @@ void NVPTXAsmPrinter::bufferAggregateConstant(const Constant *CPV,
// buildTypeNameMap - Run through symbol table looking for type names.
//
bool NVPTXAsmPrinter::isImageType(Type *Ty) {
std::map<Type *, std::string>::iterator PI = TypeNameMap.find(Ty);
return PI != TypeNameMap.end() && (!PI->second.compare("struct._image1d_t") ||
!PI->second.compare("struct._image2d_t") ||
!PI->second.compare("struct._image3d_t"));
}
bool NVPTXAsmPrinter::ignoreLoc(const MachineInstr &MI) {
switch (MI.getOpcode()) {

View File

@ -212,28 +212,21 @@ private:
MCOperand GetSymbolRef(const MCSymbol *Symbol);
unsigned encodeVirtualRegister(unsigned Reg);
void EmitAlignment(unsigned NumBits, const GlobalValue *GV = nullptr) const {}
void printVecModifiedImmediate(const MachineOperand &MO, const char *Modifier,
raw_ostream &O);
void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
const char *Modifier = nullptr);
void printImplicitDef(const MachineInstr *MI, raw_ostream &O) const;
void printModuleLevelGV(const GlobalVariable *GVar, raw_ostream &O,
bool = false);
void printParamName(int paramIndex, raw_ostream &O);
void printParamName(Function::const_arg_iterator I, int paramIndex,
raw_ostream &O);
void emitGlobals(const Module &M);
void emitHeader(Module &M, raw_ostream &O, const NVPTXSubtarget &STI);
void emitKernelFunctionDirectives(const Function &F, raw_ostream &O) const;
void emitVirtualRegister(unsigned int vr, raw_ostream &);
void emitFunctionExternParamList(const MachineFunction &MF);
void emitFunctionParamList(const Function *, raw_ostream &O);
void emitFunctionParamList(const MachineFunction &MF, raw_ostream &O);
void setAndEmitFunctionVirtualRegisters(const MachineFunction &MF);
void emitFunctionTempData(const MachineFunction &MF, unsigned &FrameSize);
bool isImageType(Type *Ty);
void printReturnValStr(const Function *, raw_ostream &O);
void printReturnValStr(const MachineFunction &MF, raw_ostream &O);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
@ -288,13 +281,9 @@ private:
void bufferLEByte(const Constant *CPV, int Bytes, AggBuffer *aggBuffer);
void bufferAggregateConstant(const Constant *CV, AggBuffer *aggBuffer);
void printOperandProper(const MachineOperand &MO);
void emitLinkageDirective(const GlobalValue *V, raw_ostream &O);
void emitDeclarations(const Module &, raw_ostream &O);
void emitDeclaration(const Function *, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo);
void emitDemotedVars(const Function *, raw_ostream &);
bool lowerImageHandleOperand(const MachineInstr *MI, unsigned OpNo,

View File

@ -2012,15 +2012,6 @@ SDValue NVPTXTargetLowering::LowerSTOREi1(SDValue Op, SelectionDAG &DAG) const {
return Result;
}
SDValue NVPTXTargetLowering::getExtSymb(SelectionDAG &DAG, const char *inname,
int idx, EVT v) const {
std::string *name = nvTM->getManagedStrPool()->getManagedString(inname);
std::stringstream suffix;
suffix << idx;
*name += suffix.str();
return DAG.getTargetExternalSymbol(name->c_str(), v);
}
SDValue
NVPTXTargetLowering::getParamSymbol(SelectionDAG &DAG, int idx, EVT v) const {
std::string ParamSym;
@ -2034,10 +2025,6 @@ NVPTXTargetLowering::getParamSymbol(SelectionDAG &DAG, int idx, EVT v) const {
return DAG.getTargetExternalSymbol(SavedStr->c_str(), v);
}
SDValue NVPTXTargetLowering::getParamHelpSymbol(SelectionDAG &DAG, int idx) {
return getExtSymb(DAG, ".HLPPARAM", idx);
}
// Check to see if the kernel argument is image*_t or sampler_t
bool llvm::isImageOrSamplerVal(const Value *arg, const Module *context) {
@ -2550,20 +2537,6 @@ void NVPTXTargetLowering::LowerAsmOperandForConstraint(
TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
}
// NVPTX suuport vector of legal types of any length in Intrinsics because the
// NVPTX specific type legalizer
// will legalize them to the PTX supported length.
bool NVPTXTargetLowering::isTypeSupportedInIntrinsic(MVT VT) const {
if (isTypeLegal(VT))
return true;
if (VT.isVector()) {
MVT eVT = VT.getVectorElementType();
if (isTypeLegal(eVT))
return true;
}
return false;
}
static unsigned getOpcForTextureInstr(unsigned Intrinsic) {
switch (Intrinsic) {
default:
@ -3823,11 +3796,6 @@ NVPTXTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
}
/// getFunctionAlignment - Return the Log2 alignment of this function.
unsigned NVPTXTargetLowering::getFunctionAlignment(const Function *) const {
return 4;
}
//===----------------------------------------------------------------------===//
// NVPTX DAG Combining
//===----------------------------------------------------------------------===//

View File

@ -441,13 +441,9 @@ public:
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerGlobalAddress(const GlobalValue *GV, int64_t Offset,
SelectionDAG &DAG) const;
const char *getTargetNodeName(unsigned Opcode) const override;
bool isTypeSupportedInIntrinsic(MVT VT) const;
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
unsigned Intrinsic) const override;
@ -467,9 +463,6 @@ public:
DstTy->getPrimitiveSizeInBits() == 32;
}
/// getFunctionAlignment - Return the Log2 alignment of this function.
unsigned getFunctionAlignment(const Function *F) const;
EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Ctx,
EVT VT) const override {
if (VT.isVector())
@ -523,11 +516,7 @@ public:
private:
const NVPTXSubtarget &STI; // cache the subtarget here
SDValue getExtSymb(SelectionDAG &DAG, const char *name, int idx,
EVT = MVT::i32) const;
SDValue getParamSymbol(SelectionDAG &DAG, int idx, EVT) const;
SDValue getParamHelpSymbol(SelectionDAG &DAG, int idx);
SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;

View File

@ -87,27 +87,6 @@ bool NVPTXInstrInfo::isMoveInstr(const MachineInstr &MI, unsigned &SrcReg,
return false;
}
bool NVPTXInstrInfo::isReadSpecialReg(MachineInstr &MI) const {
switch (MI.getOpcode()) {
default:
return false;
case NVPTX::INT_PTX_SREG_NTID_X:
case NVPTX::INT_PTX_SREG_NTID_Y:
case NVPTX::INT_PTX_SREG_NTID_Z:
case NVPTX::INT_PTX_SREG_TID_X:
case NVPTX::INT_PTX_SREG_TID_Y:
case NVPTX::INT_PTX_SREG_TID_Z:
case NVPTX::INT_PTX_SREG_CTAID_X:
case NVPTX::INT_PTX_SREG_CTAID_Y:
case NVPTX::INT_PTX_SREG_CTAID_Z:
case NVPTX::INT_PTX_SREG_NCTAID_X:
case NVPTX::INT_PTX_SREG_NCTAID_Y:
case NVPTX::INT_PTX_SREG_NCTAID_Z:
case NVPTX::INT_PTX_SREG_WARPSIZE:
return true;
}
}
bool NVPTXInstrInfo::isLoadInstr(const MachineInstr &MI,
unsigned &AddrSpace) const {
bool isLoad = false;

View File

@ -56,7 +56,6 @@ public:
unsigned &DestReg) const;
bool isLoadInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
bool isStoreInstr(const MachineInstr &MI, unsigned &AddrSpace) const;
bool isReadSpecialReg(MachineInstr &MI) const;
virtual bool CanTailMerge(const MachineInstr *MI) const;
// Branch analysis.

View File

@ -335,99 +335,6 @@ bool llvm::getAlign(const CallInst &I, unsigned index, unsigned &align) {
return false;
}
bool llvm::isBarrierIntrinsic(Intrinsic::ID id) {
return (id == Intrinsic::nvvm_barrier0) ||
(id == Intrinsic::nvvm_barrier0_popc) ||
(id == Intrinsic::nvvm_barrier0_and) ||
(id == Intrinsic::nvvm_barrier0_or) ||
(id == Intrinsic::cuda_syncthreads);
}
// Interface for checking all memory space transfer related intrinsics
bool llvm::isMemorySpaceTransferIntrinsic(Intrinsic::ID id) {
return id == Intrinsic::nvvm_ptr_local_to_gen ||
id == Intrinsic::nvvm_ptr_shared_to_gen ||
id == Intrinsic::nvvm_ptr_global_to_gen ||
id == Intrinsic::nvvm_ptr_constant_to_gen ||
id == Intrinsic::nvvm_ptr_gen_to_global ||
id == Intrinsic::nvvm_ptr_gen_to_shared ||
id == Intrinsic::nvvm_ptr_gen_to_local ||
id == Intrinsic::nvvm_ptr_gen_to_constant ||
id == Intrinsic::nvvm_ptr_gen_to_param;
}
// consider several special intrinsics in striping pointer casts, and
// provide an option to ignore GEP indices for find out the base address only
// which could be used in simple alias disambiguation.
const Value *
llvm::skipPointerTransfer(const Value *V, bool ignore_GEP_indices) {
V = V->stripPointerCasts();
while (true) {
if (const IntrinsicInst *IS = dyn_cast<IntrinsicInst>(V)) {
if (isMemorySpaceTransferIntrinsic(IS->getIntrinsicID())) {
V = IS->getArgOperand(0)->stripPointerCasts();
continue;
}
} else if (ignore_GEP_indices)
if (const GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
V = GEP->getPointerOperand()->stripPointerCasts();
continue;
}
break;
}
return V;
}
// consider several special intrinsics in striping pointer casts, and
// - ignore GEP indices for find out the base address only, and
// - tracking PHINode
// which could be used in simple alias disambiguation.
const Value *
llvm::skipPointerTransfer(const Value *V, std::set<const Value *> &processed) {
if (processed.find(V) != processed.end())
return nullptr;
processed.insert(V);
const Value *V2 = V->stripPointerCasts();
if (V2 != V && processed.find(V2) != processed.end())
return nullptr;
processed.insert(V2);
V = V2;
while (true) {
if (const IntrinsicInst *IS = dyn_cast<IntrinsicInst>(V)) {
if (isMemorySpaceTransferIntrinsic(IS->getIntrinsicID())) {
V = IS->getArgOperand(0)->stripPointerCasts();
continue;
}
} else if (const GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
V = GEP->getPointerOperand()->stripPointerCasts();
continue;
} else if (const PHINode *PN = dyn_cast<PHINode>(V)) {
if (V != V2 && processed.find(V) != processed.end())
return nullptr;
processed.insert(PN);
const Value *common = nullptr;
for (unsigned i = 0; i != PN->getNumIncomingValues(); ++i) {
const Value *pv = PN->getIncomingValue(i);
const Value *base = skipPointerTransfer(pv, processed);
if (base) {
if (!common)
common = base;
else if (common != base)
return PN;
}
}
if (!common)
return PN;
V = common;
}
break;
}
return V;
}
// The following are some useful utilities for debugging
BasicBlock *llvm::getParentBlock(Value *v) {

View File

@ -61,27 +61,6 @@ bool isKernelFunction(const llvm::Function &);
bool getAlign(const llvm::Function &, unsigned index, unsigned &);
bool getAlign(const llvm::CallInst &, unsigned index, unsigned &);
bool isBarrierIntrinsic(llvm::Intrinsic::ID);
/// make_vector - Helper function which is useful for building temporary vectors
/// to pass into type construction of CallInst ctors. This turns a null
/// terminated list of pointers (or other value types) into a real live vector.
///
template <typename T> inline std::vector<T> make_vector(T A, ...) {
va_list Args;
va_start(Args, A);
std::vector<T> Result;
Result.push_back(A);
while (T Val = va_arg(Args, T))
Result.push_back(Val);
va_end(Args);
return Result;
}
bool isMemorySpaceTransferIntrinsic(Intrinsic::ID id);
const Value *skipPointerTransfer(const Value *V, bool ignore_GEP_indices);
const Value *
skipPointerTransfer(const Value *V, std::set<const Value *> &processed);
BasicBlock *getParentBlock(Value *v);
Function *getParentFunction(Value *v);
void dumpBlock(Value *v, char *blockName);