From c4ce336205573913ea85c7578ea05e63151579ed Mon Sep 17 00:00:00 2001
From: Dan Gohman <gohman@apple.com>
Date: Thu, 18 Dec 2008 22:11:34 +0000
Subject: [PATCH] Make LowerSubregs' debug output for EXTRACT_SUBREG consistent
 with that of INSERT_SUBREG and SUBREG_TO_REG.

llvm-svn: 61218
---
 llvm/lib/CodeGen/LowerSubregs.cpp | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/LowerSubregs.cpp b/llvm/lib/CodeGen/LowerSubregs.cpp
index 0cb6aab6db5d..77e8d65f590c 100644
--- a/llvm/lib/CodeGen/LowerSubregs.cpp
+++ b/llvm/lib/CodeGen/LowerSubregs.cpp
@@ -80,7 +80,11 @@ bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) {
          
   DOUT << "subreg: CONVERTING: " << *MI;
 
-  if (SrcReg != DstReg) {
+  if (SrcReg == DstReg) {
+    // No need to insert an identify copy instruction.
+    DOUT << "subreg: eliminated!";
+  } else {
+    // Insert copy
     const TargetRegisterClass *TRC = TRI.getPhysicalRegisterRegClass(DstReg);
     assert(TRC == TRI.getPhysicalRegisterRegClass(SrcReg) &&
             "Extract subreg and Dst must be of same register class");
@@ -177,6 +181,7 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) {
     const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
     const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
     TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+
 #ifndef NDEBUG
     MachineBasicBlock::iterator dMI = MI;
     DOUT << "subreg: " << *(--dMI);