From c43d0360cc94893cc03933dcd31ab20be97e0603 Mon Sep 17 00:00:00 2001 From: Tobias Grosser Date: Thu, 31 Aug 2017 03:17:35 +0000 Subject: [PATCH] [BlockGenerator] Generate entry block of regions from instruction lists The adds code generation support for the previous commit. This patch has been re-applied, after the memory issue in the previous patch has been fixed. llvm-svn: 312211 --- polly/include/polly/ScopInfo.h | 7 ++- polly/lib/CodeGen/BlockGenerators.cpp | 7 ++- .../partial_write_in_region_with_loop.ll | 15 ++++-- .../Isl/CodeGen/region-with-instructions.ll | 47 +++++++++++++++++++ 4 files changed, 69 insertions(+), 7 deletions(-) create mode 100644 polly/test/Isl/CodeGen/region-with-instructions.ll diff --git a/polly/include/polly/ScopInfo.h b/polly/include/polly/ScopInfo.h index 6235071dbb56..44f307827cbb 100644 --- a/polly/include/polly/ScopInfo.h +++ b/polly/include/polly/ScopInfo.h @@ -2202,8 +2202,11 @@ private: /// A new statement for @p R will be created and added to the statement vector /// and map. /// - /// @param R The region we build the statement for. - /// @param SurroundingLoop The loop the created statement is contained in. + /// @param R The region we build the statement for. + /// @param SurroundingLoop The loop the created statement is contained + /// in. + /// @param EntryBlockInstructions The (interesting) instructions in the + /// entry block of the region statement. void addScopStmt(Region *R, Loop *SurroundingLoop, std::vector EntryBlockInstructions); diff --git a/polly/lib/CodeGen/BlockGenerators.cpp b/polly/lib/CodeGen/BlockGenerators.cpp index fc3a82972ced..5988fc88da04 100644 --- a/polly/lib/CodeGen/BlockGenerators.cpp +++ b/polly/lib/CodeGen/BlockGenerators.cpp @@ -450,7 +450,12 @@ void BlockGenerator::copyBB(ScopStmt &Stmt, BasicBlock *BB, BasicBlock *CopyBB, isl_id_to_ast_expr *NewAccesses) { EntryBB = &CopyBB->getParent()->getEntryBlock(); - if (Stmt.isBlockStmt()) + // Block statements and the entry blocks of region statement are code + // generated from instruction lists. This allow us to optimize the + // instructions that belong to a certain scop statement. As the code + // structure of region statements might be arbitrary complex, optimizing the + // instruction list is not yet supported. + if (Stmt.isBlockStmt() || (Stmt.isRegionStmt() && Stmt.getEntryBlock() == BB)) for (Instruction *Inst : Stmt.getInstructions()) copyInstruction(Stmt, Inst, BBMap, LTS, NewAccesses); else diff --git a/polly/test/Isl/CodeGen/partial_write_in_region_with_loop.ll b/polly/test/Isl/CodeGen/partial_write_in_region_with_loop.ll index 00e9df45a0cb..6b2f91adb975 100644 --- a/polly/test/Isl/CodeGen/partial_write_in_region_with_loop.ll +++ b/polly/test/Isl/CodeGen/partial_write_in_region_with_loop.ll @@ -9,8 +9,15 @@ ; CHECK:polly.stmt.bb3: ; CHECK-NEXT: %polly.subregion.iv = phi i32 [ %polly.subregion.iv.inc, %polly.stmt.bb5.cont ], [ 0, %polly.stmt.bb3.entry ] ; CHECK-NEXT: %polly.j.0 = phi i64 [ %j.0.phiops.reload, %polly.stmt.bb3.entry ], [ %p_tmp10, %polly.stmt.bb5.cont ] -; CHECK-NEXT: %p_tmp = mul nsw i64 %polly.indvar, %polly.indvar -; CHECK-NEXT: %p_tmp4 = icmp slt i64 %polly.j.0, %p_tmp +; CHECK-NEXT: %8 = zext i64 %polly.indvar to i65 +; CHECK-NEXT: %9 = add i64 %polly.indvar, -1 +; CHECK-NEXT: %10 = zext i64 %9 to i65 +; CHECK-NEXT: %11 = mul i65 %8, %10 +; CHECK-NEXT: %12 = lshr i65 %11, 1 +; CHECK-NEXT: %13 = trunc i65 %12 to i64 +; CHECK-NEXT: %14 = shl i64 %13, 1 +; CHECK-NEXT: %15 = add i64 %polly.indvar, %14 +; CHECK-NEXT: %p_tmp4 = icmp slt i64 %polly.j.0, %15 ; CHECK-NEXT: %polly.subregion.iv.inc = add i32 %polly.subregion.iv, 1 ; CHECK-NEXT: br i1 %p_tmp4, label %polly.stmt.bb5, label %polly.stmt.bb11.exit @@ -18,8 +25,8 @@ ; CHECK-NEXT: %p_tmp6 = getelementptr inbounds float, float* %B, i64 42 ; CHECK-NEXT: %tmp7_p_scalar_ = load float, float* %p_tmp6 ; CHECK-NEXT: %p_tmp8 = fadd float %tmp7_p_scalar_, 1.000000e+00 -; CHECK-NEXT: %8 = icmp sle i64 %polly.indvar, 9 -; CHECK-NEXT: %polly.Stmt_bb3__TO__bb11_MayWrite2.cond = icmp ne i1 %8, false +; CHECK-NEXT: %16 = icmp sle i64 %polly.indvar, 9 +; CHECK-NEXT: %polly.Stmt_bb3__TO__bb11_MayWrite2.cond = icmp ne i1 %16, false ; CHECK-NEXT: br i1 %polly.Stmt_bb3__TO__bb11_MayWrite2.cond, label %polly.stmt.bb5.Stmt_bb3__TO__bb11_MayWrite2.partial, label %polly.stmt.bb5.cont ; CHECK:polly.stmt.bb5.Stmt_bb3__TO__bb11_MayWrite2.partial: ; preds = %polly.stmt.bb5 diff --git a/polly/test/Isl/CodeGen/region-with-instructions.ll b/polly/test/Isl/CodeGen/region-with-instructions.ll new file mode 100644 index 000000000000..c277f605e9bd --- /dev/null +++ b/polly/test/Isl/CodeGen/region-with-instructions.ll @@ -0,0 +1,47 @@ +; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s + +; CHECK-LABEL: polly.stmt.bb48: +; CHECK-NEXT: %scevgep = getelementptr i64, i64* %A, i64 %polly.indvar +; CHECK-NEXT: %tmp51_p_scalar_ = load i64, i64* %scevgep, +; CHECK-NEXT: %p_tmp52 = and i64 %tmp51_p_scalar_, %tmp26 +; CHECK-NEXT: %p_tmp53 = icmp eq i64 %p_tmp52, %tmp26 +; CHECK-NEXT: store i64 42, i64* %scevgep, align 8 +; CHECK-NEXT: br i1 %p_tmp53, label %polly.stmt.bb54, label %polly.stmt.bb56.exit + +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" + +define void @quux(i32 %arg, i32 %arg1, i64* %A, i64 %tmp9, i64 %tmp24, i64 %tmp14, i64 %tmp22, i64 %tmp44) { +bb: + %tmp26 = or i64 %tmp22, %tmp24 + br label %bb39 + +bb39: ; preds = %bb39, %bb38 + %tmp45 = icmp eq i64 %tmp44, %tmp9 + br i1 %tmp45, label %bb46, label %bb81 + +bb46: ; preds = %bb39 + %tmp47 = or i64 1, %tmp14 + br label %bb48 + +bb48: ; preds = %bb56, %bb46 + %tmp49 = phi i64 [ 0, %bb46 ], [ %tmp57, %bb56 ] + %tmp50 = getelementptr inbounds i64, i64* %A, i64 %tmp49 + %tmp51 = load i64, i64* %tmp50, align 8 + %tmp52 = and i64 %tmp51, %tmp26 + %tmp53 = icmp eq i64 %tmp52, %tmp26 + store i64 42, i64* %tmp50, align 8 + br i1 %tmp53, label %bb54, label %bb56 + +bb54: ; preds = %bb48 + %tmp55 = xor i64 %tmp51, %tmp47 + store i64 %tmp55, i64* %tmp50, align 8 + br label %bb56 + +bb56: ; preds = %bb54, %bb48 + %tmp57 = add nuw nsw i64 %tmp49, 1 + %tmp58 = icmp eq i64 %tmp57, %tmp9 + br i1 %tmp58, label %bb81, label %bb48 + +bb81: ; preds = %bb74, %bb56 + ret void +}