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[mlir] Fix build after 322d0afd87 due to change in intrinsic overloads. 

I'd forgottent to run the mlir tests after removing the scalar input overload
on the fadd/fmul reductions. This is a quick fix for the mlir bot.
This commit is contained in:
Amara Emerson 2020-10-07 11:19:54 -07:00
parent 45014ce36f
commit c1247f0e74
2 changed files with 5 additions and 7 deletions
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4
mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
View File

@ -308,9 +308,7 @@ class LLVM_VectorReductionAcc<string mnem>
llvm::Function *fn = llvm::Intrinsic::getDeclaration(
module,
llvm::Intrinsic::vector_reduce_}] # mnem # [{,
{ }] # StrJoin<!listconcat(
ListIntSubst<LLVM_IntrPatterns.result, [0]>.lst,
ListIntSubst<LLVM_IntrPatterns.operand, [1]>.lst)>.result # [{
{ }] # StrJoin<ListIntSubst<LLVM_IntrPatterns.operand, [1]>.lst>.result # [{
});
auto operands = lookupValues(opInst.getOperands());
llvm::FastMathFlags origFM = builder.getFastMathFlags();

8
mlir/test/Target/llvmir-intrinsics.mlir
View File

@ -202,13 +202,13 @@ llvm.func @vector_reductions(%arg0: !llvm.float, %arg1: !llvm.vec<8 x float>, %a
"llvm.intr.vector.reduce.umax"(%arg2) : (!llvm.vec<8 x i32>) -> !llvm.i32
// CHECK: call i32 @llvm.vector.reduce.umin.v8i32
"llvm.intr.vector.reduce.umin"(%arg2) : (!llvm.vec<8 x i32>) -> !llvm.i32
// CHECK: call float @llvm.vector.reduce.fadd.f32.v8f32
// CHECK: call float @llvm.vector.reduce.fadd.v8f32
"llvm.intr.vector.reduce.fadd"(%arg0, %arg1) : (!llvm.float, !llvm.vec<8 x float>) -> !llvm.float
// CHECK: call float @llvm.vector.reduce.fmul.f32.v8f32
// CHECK: call float @llvm.vector.reduce.fmul.v8f32
"llvm.intr.vector.reduce.fmul"(%arg0, %arg1) : (!llvm.float, !llvm.vec<8 x float>) -> !llvm.float
// CHECK: call reassoc float @llvm.vector.reduce.fadd.f32.v8f32
// CHECK: call reassoc float @llvm.vector.reduce.fadd.v8f32
"llvm.intr.vector.reduce.fadd"(%arg0, %arg1) {reassoc = true} : (!llvm.float, !llvm.vec<8 x float>) -> !llvm.float
// CHECK: call reassoc float @llvm.vector.reduce.fmul.f32.v8f32
// CHECK: call reassoc float @llvm.vector.reduce.fmul.v8f32
"llvm.intr.vector.reduce.fmul"(%arg0, %arg1) {reassoc = true} : (!llvm.float, !llvm.vec<8 x float>) -> !llvm.float
// CHECK: call i32 @llvm.vector.reduce.xor.v8i32
"llvm.intr.vector.reduce.xor"(%arg2) : (!llvm.vec<8 x i32>) -> !llvm.i32