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@ -80,8 +80,8 @@ SDValue MSP430TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
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/// generate load operations for arguments places on the stack.
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// FIXME: struct return stuff
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// FIXME: varargs
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SDValue MSP430TargetLowering:: LowerCCCArguments(SDValue Op,
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SelectionDAG &DAG) {
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SDValue MSP430TargetLowering::LowerCCCArguments(SDValue Op,
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SelectionDAG &DAG) {
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MachineRegisterInfo &RegInfo = MF.getRegInfo();
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@ -193,8 +193,8 @@ SDValue MSP430TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) {
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Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
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Op.getOperand(i*2+1), Flag);
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// guarantee that all emitted copies are
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// stuck together, avoiding something bad
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// Guarantee that all emitted copies are stuck together,
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// avoiding something bad.
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Flag = Chain.getValue(1);
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}
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@ -38,7 +38,19 @@ MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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BitVector
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MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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assert(0 && "Not implemented yet!");
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BitVector Reserved(getNumRegs());
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// Mark 4 special registers as reserved.
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Reserved.set(MSP430::PC);
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Reserved.set(MSP430::SP);
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Reserved.set(MSP430::SR);
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Reserved.set(MSP430::CG);
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// Mark frame pointer as reserved if needed.
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if (hasFP(MF))
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Reserved.set(MSP430::FP);
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return Reserved;
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}
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bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const {
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