don't repeat function names in comments; NFC

llvm-svn: 243751
This commit is contained in:
Sanjay Patel 2015-07-31 15:10:44 +00:00
parent dfc1d96ef8
commit c0ff8bd92e
1 changed files with 20 additions and 34 deletions

View File

@ -49,11 +49,10 @@ public:
MachineInstrBuilder() : MF(nullptr), MI(nullptr) {} MachineInstrBuilder() : MF(nullptr), MI(nullptr) {}
/// Create a MachineInstrBuilder for manipulating an existing instruction. /// Create a MachineInstrBuilder for manipulating an existing instruction.
/// F must be the machine function that was used to allocate I. /// F must be the machine function that was used to allocate I.
MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {} MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
/// Allow automatic conversion to the machine instruction we are working on. /// Allow automatic conversion to the machine instruction we are working on.
///
operator MachineInstr*() const { return MI; } operator MachineInstr*() const { return MI; }
MachineInstr *operator->() const { return MI; } MachineInstr *operator->() const { return MI; }
operator MachineBasicBlock::iterator() const { return MI; } operator MachineBasicBlock::iterator() const { return MI; }
@ -62,11 +61,9 @@ public:
/// explicitly. /// explicitly.
MachineInstr *getInstr() const { return MI; } MachineInstr *getInstr() const { return MI; }
/// addReg - Add a new virtual register operand... /// Add a new virtual register operand.
/// const MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
const unsigned SubReg = 0) const {
MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
unsigned SubReg = 0) const {
assert((flags & 0x1) == 0 && assert((flags & 0x1) == 0 &&
"Passing in 'true' to addReg is forbidden! Use enums instead."); "Passing in 'true' to addReg is forbidden! Use enums instead.");
MI->addOperand(*MF, MachineOperand::CreateReg(RegNo, MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
@ -82,8 +79,7 @@ public:
return *this; return *this;
} }
/// addImm - Add a new immediate operand. /// Add a new immediate operand.
///
const MachineInstrBuilder &addImm(int64_t Val) const { const MachineInstrBuilder &addImm(int64_t Val) const {
MI->addOperand(*MF, MachineOperand::CreateImm(Val)); MI->addOperand(*MF, MachineOperand::CreateImm(Val));
return *this; return *this;
@ -230,18 +226,15 @@ public:
} }
}; };
/// BuildMI - Builder interface. Specify how to create the initial instruction /// Builder interface. Specify how to create the initial instruction itself.
/// itself.
///
inline MachineInstrBuilder BuildMI(MachineFunction &MF, inline MachineInstrBuilder BuildMI(MachineFunction &MF,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID) { const MCInstrDesc &MCID) {
return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
} }
/// BuildMI - This version of the builder sets up the first operand as a /// This version of the builder sets up the first operand as a
/// destination virtual register. /// destination virtual register.
///
inline MachineInstrBuilder BuildMI(MachineFunction &MF, inline MachineInstrBuilder BuildMI(MachineFunction &MF,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID, const MCInstrDesc &MCID,
@ -250,10 +243,9 @@ inline MachineInstrBuilder BuildMI(MachineFunction &MF,
.addReg(DestReg, RegState::Define); .addReg(DestReg, RegState::Define);
} }
/// BuildMI - This version of the builder inserts the newly-built /// This version of the builder inserts the newly-built instruction before
/// instruction before the given position in the given MachineBasicBlock, and /// the given position in the given MachineBasicBlock, and sets up the first
/// sets up the first operand as a destination virtual register. /// operand as a destination virtual register.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I, MachineBasicBlock::iterator I,
DebugLoc DL, DebugLoc DL,
@ -290,10 +282,9 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
return BuildMI(BB, MII, DL, MCID, DestReg); return BuildMI(BB, MII, DL, MCID, DestReg);
} }
/// BuildMI - This version of the builder inserts the newly-built /// This version of the builder inserts the newly-built instruction before the
/// instruction before the given position in the given MachineBasicBlock, and /// given position in the given MachineBasicBlock, and does NOT take a
/// does NOT take a destination register. /// destination register.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I, MachineBasicBlock::iterator I,
DebugLoc DL, DebugLoc DL,
@ -327,20 +318,17 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
return BuildMI(BB, MII, DL, MCID); return BuildMI(BB, MII, DL, MCID);
} }
/// BuildMI - This version of the builder inserts the newly-built /// This version of the builder inserts the newly-built instruction at the end
/// instruction at the end of the given MachineBasicBlock, and does NOT take a /// of the given MachineBasicBlock, and does NOT take a destination register.
/// destination register.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID) { const MCInstrDesc &MCID) {
return BuildMI(*BB, BB->end(), DL, MCID); return BuildMI(*BB, BB->end(), DL, MCID);
} }
/// BuildMI - This version of the builder inserts the newly-built /// This version of the builder inserts the newly-built instruction at the
/// instruction at the end of the given MachineBasicBlock, and sets up the first /// end of the given MachineBasicBlock, and sets up the first operand as a
/// operand as a destination virtual register. /// destination virtual register.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
DebugLoc DL, DebugLoc DL,
const MCInstrDesc &MCID, const MCInstrDesc &MCID,
@ -348,11 +336,10 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
return BuildMI(*BB, BB->end(), DL, MCID, DestReg); return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
} }
/// BuildMI - This version of the builder builds a DBG_VALUE intrinsic /// This version of the builder builds a DBG_VALUE intrinsic
/// for either a value in a register or a register-indirect+offset /// for either a value in a register or a register-indirect+offset
/// address. The convention is that a DBG_VALUE is indirect iff the /// address. The convention is that a DBG_VALUE is indirect iff the
/// second operand is an immediate. /// second operand is an immediate.
///
inline MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, inline MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL,
const MCInstrDesc &MCID, bool IsIndirect, const MCInstrDesc &MCID, bool IsIndirect,
unsigned Reg, unsigned Offset, unsigned Reg, unsigned Offset,
@ -377,10 +364,9 @@ inline MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL,
} }
} }
/// BuildMI - This version of the builder builds a DBG_VALUE intrinsic /// This version of the builder builds a DBG_VALUE intrinsic
/// for either a value in a register or a register-indirect+offset /// for either a value in a register or a register-indirect+offset
/// address and inserts it at position I. /// address and inserts it at position I.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I, DebugLoc DL, MachineBasicBlock::iterator I, DebugLoc DL,
const MCInstrDesc &MCID, bool IsIndirect, const MCInstrDesc &MCID, bool IsIndirect,