diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 3bae15c6aab8..3ebaaa465f60 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -853,6 +853,23 @@ SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2,
     }
   }
   
+  // Check to see if this is the equivalent of seteq X, 0.
+  // select_cc seteq X, 0, 1, 0 -> setcc X, 0, seteq -> srl (ctlz X), size(X)-1
+  if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() &&
+      N3C && (N3C->getValue() == 1)) {
+    MVT::ValueType XType = N1.getValueType();
+    if (TLI.getOperationAction(ISD::SETCC, TLI.getSetCCResultTy()) == 
+        TargetLowering::Legal) {
+      return getSetCC(TLI.getSetCCResultTy(), N1, N2, ISD::SETEQ);
+    }
+    if (TLI.getOperationAction(ISD::CTLZ, XType) == TargetLowering::Legal) {
+      SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1);
+      return getNode(ISD::SRL, XType, Ctlz, 
+                     getConstant(MVT::getSizeInBits(XType)-1,
+                                 TLI.getShiftAmountTy()));
+    }
+  }
+
   // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X ->
   // Y = sra (X, size(X)-1); xor (add (X, Y), Y)
   if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) &&