parent
05f716a972
commit
bb635a27a4
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@ -51,16 +51,16 @@ X86InstrInfo::reverseBranchCondition(MachineBasicBlock::iterator MI) const {
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unsigned ROpcode;
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switch (Opcode) {
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case X86::JB: ROpcode = X86::JAE; break;
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case X86::JAE: ROpcode = X86::JB; break;
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case X86::JAE: ROpcode = X86::JB; break;
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case X86::JE: ROpcode = X86::JNE; break;
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case X86::JNE: ROpcode = X86::JE; break;
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case X86::JBE: ROpcode = X86::JA; break;
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case X86::JNE: ROpcode = X86::JE; break;
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case X86::JBE: ROpcode = X86::JA; break;
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case X86::JA: ROpcode = X86::JBE; break;
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case X86::JS: ROpcode = X86::JNS; break;
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case X86::JNS: ROpcode = X86::JS; break;
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case X86::JNS: ROpcode = X86::JS; break;
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case X86::JL: ROpcode = X86::JGE; break;
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case X86::JGE: ROpcode = X86::JL; break;
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case X86::JLE: ROpcode = X86::JG; break;
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case X86::JGE: ROpcode = X86::JL; break;
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case X86::JLE: ROpcode = X86::JG; break;
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case X86::JG: ROpcode = X86::JLE; break;
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default:
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assert(0 && "Cannot reverse unconditional branches!");
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