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Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250. 

llvm-svn: 61613
This commit is contained in:
Dan Gohman 2009-01-03 19:22:06 +00:00
parent 4d41fdf4ca
commit b9fa1d24f8
2 changed files with 19 additions and 0 deletions
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2
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -3277,6 +3277,8 @@ SDValue DAGCombiner::GetDemandedBits(SDValue V, const APInt &Mask) {
if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
// See if we can recursively simplify the LHS.
unsigned Amt = RHSC->getZExtValue();
// Watch out for shift count overflow though.
if (Amt >= Mask.getBitWidth()) break;
APInt NewMask = Mask << Amt;
SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask);
if (SimplifyLHS.getNode()) {

17
llvm/test/CodeGen/X86/pr3250.ll Normal file
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@ -0,0 +1,17 @@
; RUN: llvm-as < %s | llc -march=x86
; PR3250
declare i32 @safe_sub_func_short_u_u(i16 signext, i16 signext) nounwind
define i32 @func_106(i32 %p_107) nounwind {
entry:
%0 = tail call i32 (...)* @safe_div_(i32 %p_107, i32 1) nounwind
; <i32> [#uses=1]
%1 = lshr i32 %0, -9 ; <i32> [#uses=1]
%2 = trunc i32 %1 to i16 ; <i16> [#uses=1]
%3 = tail call i32 @safe_sub_func_short_u_u(i16 signext 1, i16 signext
%2) nounwind ; <i32> [#uses=0]
ret i32 undef
}
declare i32 @safe_div_(...)