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Add the 64-bit versions of the DS* Altivec instructions. 

llvm-svn: 41717
This commit is contained in:
Bill Wendling 2007-09-05 04:05:20 +00:00
parent 7eccba3b8e
commit b9bf812ba5
2 changed files with 60 additions and 14 deletions
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59
llvm/lib/Target/PowerPC/PPCInstrAltivec.td
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@ -163,18 +163,37 @@ class VX2_Int<bits<11> xo, string opc, Intrinsic IntID>
def IMPLICIT_DEF_VRRC : Pseudo<(outs VRRC:$rD), (ins),"; IMPLICIT_DEF_VRRC $rD",
[(set VRRC:$rD, (v4i32 (undef)))]>;
def DSS : DSS_Form<822, (outs), (ins u5imm:$ZERO0, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2),
"dss $STRM", LdStGeneral /*FIXME*/, []>;
def DSSALL: DSS_Form<822, (outs), (ins u5imm:$ONE, u5imm:$ZERO0,u5imm:$ZERO1,u5imm:$ZERO2),
"dssall", LdStGeneral /*FIXME*/, []>;
def DST : DSS_Form<342, (outs), (ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
"dst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTT : DSS_Form<342, (outs), (ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
"dstt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTST : DSS_Form<374, (outs), (ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
"dstst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTSTT: DSS_Form<374, (outs), (ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
"dststt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSS : DSS_Form<822, (outs),
(ins u5imm:$ZERO0, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2),
"dss $STRM", LdStGeneral /*FIXME*/, []>;
def DSSALL : DSS_Form<822, (outs),
(ins u5imm:$ONE, u5imm:$ZERO0,u5imm:$ZERO1,u5imm:$ZERO2),
"dssall", LdStGeneral /*FIXME*/, []>;
def DST : DSS_Form<342, (outs),
(ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
"dst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTT : DSS_Form<342, (outs),
(ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
"dstt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTST : DSS_Form<374, (outs),
(ins u5imm:$ZERO, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
"dstst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTSTT : DSS_Form<374, (outs),
(ins u5imm:$ONE, u5imm:$STRM, GPRC:$rA, GPRC:$rB),
"dststt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DST64 : DSS_Form<342, (outs),
(ins u5imm:$ZERO, u5imm:$STRM, G8RC:$rA, GPRC:$rB),
"dst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTT64 : DSS_Form<342, (outs),
(ins u5imm:$ONE, u5imm:$STRM, G8RC:$rA, GPRC:$rB),
"dstt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTST64 : DSS_Form<374, (outs),
(ins u5imm:$ZERO, u5imm:$STRM, G8RC:$rA, GPRC:$rB),
"dstst $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def DSTSTT64 : DSS_Form<374, (outs),
(ins u5imm:$ONE, u5imm:$STRM, G8RC:$rA, GPRC:$rB),
"dststt $rA, $rB, $STRM", LdStGeneral /*FIXME*/, []>;
def MFVSCR : VXForm_4<1540, (outs VRRC:$vD), (ins),
"mfvscr $vD", LdStGeneral,
@ -536,9 +555,11 @@ def V_SET0 : VXForm_setzero<1220, (outs VRRC:$vD), (ins),
// Additional Altivec Patterns
//
// DS* intrinsics.
def : Pat<(int_ppc_altivec_dss imm:$STRM), (DSS 0, imm:$STRM, 0, 0)>;
// DS* intrinsics
def : Pat<(int_ppc_altivec_dssall), (DSSALL 1, 0, 0, 0)>;
def : Pat<(int_ppc_altivec_dss imm:$STRM), (DSS 0, imm:$STRM, 0, 0)>;
// * 32-bit
def : Pat<(int_ppc_altivec_dst GPRC:$rA, GPRC:$rB, imm:$STRM),
(DST 0, imm:$STRM, GPRC:$rA, GPRC:$rB)>;
def : Pat<(int_ppc_altivec_dstt GPRC:$rA, GPRC:$rB, imm:$STRM),
@ -548,6 +569,16 @@ def : Pat<(int_ppc_altivec_dstst GPRC:$rA, GPRC:$rB, imm:$STRM),
def : Pat<(int_ppc_altivec_dststt GPRC:$rA, GPRC:$rB, imm:$STRM),
(DSTSTT 1, imm:$STRM, GPRC:$rA, GPRC:$rB)>;
// * 64-bit
def : Pat<(int_ppc_altivec_dst G8RC:$rA, GPRC:$rB, imm:$STRM),
(DST64 0, imm:$STRM, (i64 G8RC:$rA), GPRC:$rB)>;
def : Pat<(int_ppc_altivec_dstt G8RC:$rA, GPRC:$rB, imm:$STRM),
(DSTT64 1, imm:$STRM, (i64 G8RC:$rA), GPRC:$rB)>;
def : Pat<(int_ppc_altivec_dstst G8RC:$rA, GPRC:$rB, imm:$STRM),
(DSTST64 0, imm:$STRM, (i64 G8RC:$rA), GPRC:$rB)>;
def : Pat<(int_ppc_altivec_dststt G8RC:$rA, GPRC:$rB, imm:$STRM),
(DSTSTT64 1, imm:$STRM, (i64 G8RC:$rA), GPRC:$rB)>;
// Undef.
def : Pat<(v16i8 (undef)), (IMPLICIT_DEF_VRRC)>;
def : Pat<(v8i16 (undef)), (IMPLICIT_DEF_VRRC)>;

15
llvm/test/CodeGen/PowerPC/2007-09-04-AltivecDST.ll Normal file
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@ -0,0 +1,15 @@
; RUN: llvm-as < %s | llc -march=ppc64 | grep dst | count 4
define hidden void @_Z4borkPc(i8* %image) {
entry:
tail call void @llvm.ppc.altivec.dst( i8* %image, i32 8, i32 0 )
tail call void @llvm.ppc.altivec.dstt( i8* %image, i32 8, i32 0 )
tail call void @llvm.ppc.altivec.dstst( i8* %image, i32 8, i32 0 )
tail call void @llvm.ppc.altivec.dststt( i8* %image, i32 8, i32 0 )
ret void
}
declare void @llvm.ppc.altivec.dst(i8*, i32, i32)
declare void @llvm.ppc.altivec.dstt(i8*, i32, i32)
declare void @llvm.ppc.altivec.dstst(i8*, i32, i32)
declare void @llvm.ppc.altivec.dststt(i8*, i32, i32)