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692dc54b0d
commit
b97768499f
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@ -582,3 +582,28 @@ define void @merge_vec_element_and_scalar_load([6 x i64]* %array) {
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; CHECK-NEXT: movq %rcx, 40(%rdi)
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; CHECK-NEXT: retq
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}
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; Don't let a non-consecutive store thwart merging of the last two.
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define void @almost_consecutive_stores(i8* %p) {
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store i8 0, i8* %p
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%p1 = getelementptr i8, i8* %p, i64 42
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store i8 1, i8* %p1
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%p2 = getelementptr i8, i8* %p, i64 2
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store i8 2, i8* %p2
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%p3 = getelementptr i8, i8* %p, i64 3
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store i8 3, i8* %p3
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ret void
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; CHECK-LABEL: almost_consecutive_stores
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; CHECK-DAG: movb $0, (%rdi)
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; CHECK-DAG: movb $1, 42(%rdi)
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; CHECK-DAG: movb $2, 2(%rdi)
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; CHECK-DAG: movb $3, 3(%rdi)
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; CHECK: retq
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; We should able to merge the final two stores into a 16-bit store
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; FIXMECHECK-DAG: movw $770, 2(%rdi)
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}
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