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[mips] Add instruction alias (sltu). 

Summary:
The pattern sltu $r1, $r2, $imm is found in handwritten assembly which
is just a shorthand version of sltui $r1, $r2, $imm.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3508

llvm-svn: 207671
This commit is contained in:
Matheus Almeida 2014-04-30 16:29:56 +00:00
parent 83e6e1e926
commit b7be52343d
10 changed files with 11 additions and 0 deletions
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2
llvm/lib/Target/Mips/MipsInstrInfo.td
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@ -1219,6 +1219,8 @@ def : InstAlias<"negu $rt, $rs",
(SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs), 1>;
def : InstAlias<"slt $rs, $rt, $imm",
(SLTi GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm), 0>;
def : InstAlias<"sltu $rt, $rs, $imm",
(SLTiu GPR32Opnd:$rt, GPR32Opnd:$rs, simm16:$imm), 0>;
def : InstAlias<"xor $rs, $rt, $imm",
(XORi GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>;
def : InstAlias<"or $rs, $rt, $imm",

1
llvm/test/MC/Mips/mips1/valid.s
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@ -74,6 +74,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]
sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07]

1
llvm/test/MC/Mips/mips2/valid.s
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@ -86,6 +86,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sqrt.d $f17,$f22
sqrt.s $f0,$f1
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]

1
llvm/test/MC/Mips/mips3/valid.s
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@ -139,6 +139,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sqrt.d $f17,$f22
sqrt.s $f0,$f1
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]

1
llvm/test/MC/Mips/mips32/valid.s
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@ -110,6 +110,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sqrt.d $f17,$f22
sqrt.s $f0,$f1
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]

1
llvm/test/MC/Mips/mips32r2/valid.s
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@ -136,6 +136,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sqrt.d $f17,$f22
sqrt.s $f0,$f1
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]

1
llvm/test/MC/Mips/mips4/valid.s
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@ -155,6 +155,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sqrt.d $f17,$f22
sqrt.s $f0,$f1
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]

1
llvm/test/MC/Mips/mips5/valid.s
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@ -155,6 +155,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sqrt.d $f17,$f22
sqrt.s $f0,$f1
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]

1
llvm/test/MC/Mips/mips64/valid.s
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@ -168,6 +168,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sqrt.d $f17,$f22
sqrt.s $f0,$f1
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]

1
llvm/test/MC/Mips/mips64r2/valid.s
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@ -192,6 +192,7 @@
slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55]
sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b]
sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55]
sqrt.d $f17,$f22
sqrt.s $f0,$f1
sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3]