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Mips specific inline asm memory operand modifier test case 

These changes are based on commit responses for r179135.

llvm-svn: 179225
This commit is contained in:
Jack Carter 2013-04-10 22:02:32 +00:00
parent e3335039b6
commit b6bcdfd23d
1 changed files with 12 additions and 5 deletions
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17
llvm/test/CodeGen/Mips/inlineasmmemop.ll
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@ -22,19 +22,26 @@ entry:
ret i32 %0
}
; "D": Second word of double word. This works for any memory element.
; "D": Second word of double word. This works for any memory element
; double or single.
; CHECK: #APP
; CHECK-NEXT: lw ${{[0-9]+}},4(${{[0-9]+}});
; CHECK-NEXT: #NO_APP
; No "D": First word of double word. This works for any memory element
; double or single.
; CHECK: #APP
; CHECK-NEXT: lw ${{[0-9]+}},0(${{[0-9]+}});
; CHECK-NEXT: #NO_APP
@b = common global [20 x i32] zeroinitializer, align 4
define void @main() #0 {
define void @main() {
entry:
tail call void asm sideeffect " lw $0,${1:D};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3)) #1
tail call void asm sideeffect " lw $0,${1:D};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3))
tail call void asm sideeffect " lw $0,${1};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3))
ret void
}
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind }
attributes #0 = { nounwind }