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[X86][MMX] Add fast-isel support for MMX non-temporal writes 

Differential Revision: https://reviews.llvm.org/D31754

llvm-svn: 299852
This commit is contained in:
Simon Pilgrim 2017-04-10 16:58:07 +00:00
parent 570e35c157
commit b6702eaec3
2 changed files with 5 additions and 1 deletions
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4
llvm/lib/Target/X86/X86FastISel.cpp
View File

@ -528,6 +528,7 @@ bool X86FastISel::X86FastEmitLoad(EVT VT, X86AddressMode &AM,
bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill,
X86AddressMode &AM,
MachineMemOperand *MMO, bool Aligned) {
bool HasSSE1 = Subtarget->hasSSE1();
bool HasSSE2 = Subtarget->hasSSE2();
bool HasSSE4A = Subtarget->hasSSE4A();
bool HasAVX = Subtarget->hasAVX();
@ -588,6 +589,9 @@ bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill,
} else
Opc = X86::ST_Fp64m;
break;
case MVT::x86mmx:
Opc = (IsNonTemporal && HasSSE1) ? X86::MMX_MOVNTQmr : X86::MMX_MOVQ64mr;
break;
case MVT::v4f32:
if (Aligned) {
if (IsNonTemporal)

2
llvm/test/CodeGen/X86/fast-isel-nontemporal.ll
View File

@ -100,7 +100,7 @@ define void @test_mmx(x86_mmx* nocapture %a0, x86_mmx* nocapture %a1) {
; ALL: # BB#0: # %entry
; ALL-NEXT: movq (%rdi), %mm0
; ALL-NEXT: psrlq $3, %mm0
; ALL-NEXT: movq %mm0, (%rsi)
; ALL-NEXT: movntq %mm0, (%rsi)
; ALL-NEXT: retq
entry:
%0 = load x86_mmx, x86_mmx* %a0