[ELF] Rearrange relocation codes in natural order. NFC.
Differential revision: http://reviews.llvm.org/D15045 llvm-svn: 254393
This commit is contained in:
Igor Kudrin
parent
2c07cc70c4
commit
b4a0927853
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@ -315,6 +315,9 @@ bool X86TargetInfo::relocNeedsPlt(uint32_t Type, const SymbolBody &S) const {
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void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
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uint64_t P, uint64_t SA) const {
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switch (Type) {
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case R_386_32:
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add32le(Loc, SA);
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break;
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case R_386_GOT32:
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add32le(Loc, SA - Out<ELF32LE>::Got->getVA());
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break;
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@ -324,9 +327,6 @@ void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
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case R_386_PC32:
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add32le(Loc, SA - P);
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break;
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case R_386_32:
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add32le(Loc, SA);
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break;
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case R_386_TLS_LE:
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write32le(Loc, SA - Out<ELF32LE>::TlsPhdr->p_memsz);
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break;
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@ -462,13 +462,13 @@ bool X86_64TargetInfo::isRelRelative(uint32_t Type) const {
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switch (Type) {
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default:
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return false;
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case R_X86_64_PC64:
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case R_X86_64_PC32:
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case R_X86_64_PC16:
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case R_X86_64_PC8:
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case R_X86_64_PLT32:
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case R_X86_64_DTPOFF32:
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case R_X86_64_DTPOFF64:
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case R_X86_64_PC8:
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case R_X86_64_PC16:
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case R_X86_64_PC32:
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case R_X86_64_PC64:
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case R_X86_64_PLT32:
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return true;
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}
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}
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@ -568,20 +568,20 @@ unsigned X86_64TargetInfo::relocateTlsOptimize(uint8_t *Loc, uint8_t *BufEnd,
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uint32_t Type, uint64_t P,
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uint64_t SA) const {
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switch (Type) {
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case R_X86_64_DTPOFF32:
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relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA);
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return 0;
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case R_X86_64_GOTTPOFF:
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relocateTlsIeToLe(Loc, BufEnd, P, SA);
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return 0;
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case R_X86_64_TLSLD:
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relocateTlsLdToLe(Loc, BufEnd, P, SA);
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// The next relocation should be against __tls_get_addr, so skip it
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return 1;
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case R_X86_64_TLSGD:
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relocateTlsGdToLe(Loc, BufEnd, P, SA);
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// The next relocation should be against __tls_get_addr, so skip it
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return 1;
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case R_X86_64_DTPOFF32:
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relocateOne(Loc, BufEnd, R_X86_64_TPOFF32, P, SA);
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return 0;
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case R_X86_64_TLSLD:
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relocateTlsLdToLe(Loc, BufEnd, P, SA);
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// The next relocation should be against __tls_get_addr, so skip it
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return 1;
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}
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llvm_unreachable("Unknown TLS optimization");
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}
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@ -589,18 +589,6 @@ unsigned X86_64TargetInfo::relocateTlsOptimize(uint8_t *Loc, uint8_t *BufEnd,
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void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
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uint64_t P, uint64_t SA) const {
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switch (Type) {
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case R_X86_64_PC32:
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case R_X86_64_GOTPCREL:
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case R_X86_64_PLT32:
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case R_X86_64_TLSLD:
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case R_X86_64_TLSGD:
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case R_X86_64_TPOFF64:
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write32le(Loc, SA - P);
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break;
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case R_X86_64_64:
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case R_X86_64_DTPOFF64:
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write64le(Loc, SA);
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break;
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case R_X86_64_32:
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checkUInt<32>(SA, Type);
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write32le(Loc, SA);
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@ -609,15 +597,31 @@ void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
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checkInt<32>(SA, Type);
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write32le(Loc, SA);
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break;
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case R_X86_64_64:
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write64le(Loc, SA);
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break;
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case R_X86_64_DTPOFF32:
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write32le(Loc, SA);
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break;
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case R_X86_64_DTPOFF64:
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write64le(Loc, SA);
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break;
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case R_X86_64_GOTPCREL:
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case R_X86_64_PC32:
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case R_X86_64_PLT32:
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case R_X86_64_TLSGD:
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case R_X86_64_TLSLD:
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write32le(Loc, SA - P);
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break;
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case R_X86_64_TPOFF32: {
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uint64_t Val = SA - Out<ELF64LE>::TlsPhdr->p_memsz;
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checkInt<32>(Val, Type);
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write32le(Loc, Val);
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break;
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}
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case R_X86_64_TPOFF64:
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write32le(Loc, SA - P);
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break;
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default:
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error("unrecognized reloc " + Twine(Type));
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}
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@ -706,10 +710,10 @@ bool PPC64TargetInfo::relocNeedsGot(uint32_t Type, const SymbolBody &S) const {
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switch (Type) {
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default: return false;
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case R_PPC64_GOT16:
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case R_PPC64_GOT16_LO:
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case R_PPC64_GOT16_HI:
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case R_PPC64_GOT16_HA:
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case R_PPC64_GOT16_DS:
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case R_PPC64_GOT16_HA:
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case R_PPC64_GOT16_HI:
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case R_PPC64_GOT16_LO:
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case R_PPC64_GOT16_LO_DS:
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return true;
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}
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@ -724,8 +728,8 @@ bool PPC64TargetInfo::isRelRelative(uint32_t Type) const {
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switch (Type) {
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default:
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return true;
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case R_PPC64_TOC:
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case R_PPC64_ADDR64:
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case R_PPC64_TOC:
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return false;
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}
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}
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@ -739,14 +743,21 @@ void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
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switch (Type) {
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case R_PPC64_TOC16: Type = R_PPC64_ADDR16; SA -= TB; break;
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case R_PPC64_TOC16_DS: Type = R_PPC64_ADDR16_DS; SA -= TB; break;
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case R_PPC64_TOC16_HA: Type = R_PPC64_ADDR16_HA; SA -= TB; break;
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case R_PPC64_TOC16_HI: Type = R_PPC64_ADDR16_HI; SA -= TB; break;
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case R_PPC64_TOC16_LO: Type = R_PPC64_ADDR16_LO; SA -= TB; break;
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case R_PPC64_TOC16_LO_DS: Type = R_PPC64_ADDR16_LO_DS; SA -= TB; break;
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case R_PPC64_TOC16_HI: Type = R_PPC64_ADDR16_HI; SA -= TB; break;
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case R_PPC64_TOC16_HA: Type = R_PPC64_ADDR16_HA; SA -= TB; break;
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default: break;
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}
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switch (Type) {
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case R_PPC64_ADDR14: {
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checkAlignment<4>(SA, Type);
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// Preserve the AA/LK bits in the branch instruction
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uint8_t AALK = Loc[3];
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write16be(Loc + 2, (AALK & 3) | (SA & 0xfffc));
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break;
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}
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case R_PPC64_ADDR16:
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checkInt<16>(SA, Type);
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write16be(Loc, SA);
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@ -755,18 +766,12 @@ void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
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checkInt<16>(SA, Type);
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write16be(Loc, (read16be(Loc) & 3) | (SA & ~3));
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break;
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case R_PPC64_ADDR16_LO:
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write16be(Loc, applyPPCLo(SA));
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break;
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case R_PPC64_ADDR16_LO_DS:
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write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(SA) & ~3));
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case R_PPC64_ADDR16_HA:
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write16be(Loc, applyPPCHa(SA));
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break;
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case R_PPC64_ADDR16_HI:
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write16be(Loc, applyPPCHi(SA));
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break;
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case R_PPC64_ADDR16_HA:
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write16be(Loc, applyPPCHa(SA));
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break;
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case R_PPC64_ADDR16_HIGHER:
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write16be(Loc, applyPPCHigher(SA));
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break;
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@ -779,26 +784,28 @@ void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
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case R_PPC64_ADDR16_HIGHESTA:
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write16be(Loc, applyPPCHighesta(SA));
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break;
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case R_PPC64_ADDR14: {
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checkAlignment<4>(SA, Type);
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// Preserve the AA/LK bits in the branch instruction
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uint8_t AALK = Loc[3];
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write16be(Loc + 2, (AALK & 3) | (SA & 0xfffc));
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case R_PPC64_ADDR16_LO:
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write16be(Loc, applyPPCLo(SA));
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break;
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}
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case R_PPC64_REL16_LO:
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write16be(Loc, applyPPCLo(SA - P));
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break;
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case R_PPC64_REL16_HI:
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write16be(Loc, applyPPCHi(SA - P));
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break;
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case R_PPC64_REL16_HA:
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write16be(Loc, applyPPCHa(SA - P));
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case R_PPC64_ADDR16_LO_DS:
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write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(SA) & ~3));
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break;
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case R_PPC64_ADDR32:
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checkInt<32>(SA, Type);
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write32be(Loc, SA);
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break;
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case R_PPC64_ADDR64:
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write64be(Loc, SA);
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break;
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case R_PPC64_REL16_HA:
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write16be(Loc, applyPPCHa(SA - P));
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break;
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case R_PPC64_REL16_HI:
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write16be(Loc, applyPPCHi(SA - P));
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break;
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case R_PPC64_REL16_LO:
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write16be(Loc, applyPPCLo(SA - P));
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break;
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case R_PPC64_REL24: {
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// If we have an undefined weak symbol, we might get here with a symbol
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// address of zero. That could overflow, but the code must be unreachable,
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@ -837,7 +844,6 @@ void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
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case R_PPC64_REL64:
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write64be(Loc, SA - P);
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break;
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case R_PPC64_ADDR64:
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case R_PPC64_TOC:
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write64be(Loc, SA);
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break;
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@ -915,8 +921,8 @@ bool AArch64TargetInfo::relocNeedsPlt(uint32_t Type,
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switch (Type) {
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default:
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return false;
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case R_AARCH64_JUMP26:
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case R_AARCH64_CALL26:
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case R_AARCH64_JUMP26:
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return canBePreempted(&S, true);
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}
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}
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@ -957,39 +963,44 @@ void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
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// bits in Loc are zero.
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or32le(Loc, (SA & 0xFFF) << 10);
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break;
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case R_AARCH64_ADR_GOT_PAGE: {
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uint64_t X = getAArch64Page(SA) - getAArch64Page(P);
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checkInt<33>(X, Type);
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updateAArch64Adr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
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break;
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}
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case R_AARCH64_ADR_PREL_LO21: {
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uint64_t X = SA - P;
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checkInt<21>(X, Type);
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updateAArch64Adr(Loc, X & 0x1FFFFF);
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break;
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}
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case R_AARCH64_ADR_GOT_PAGE:
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case R_AARCH64_ADR_PREL_PG_HI21: {
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uint64_t X = getAArch64Page(SA) - getAArch64Page(P);
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checkInt<33>(X, Type);
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updateAArch64Adr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
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break;
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}
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case R_AARCH64_JUMP26:
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case R_AARCH64_CALL26: {
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case R_AARCH64_CALL26:
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case R_AARCH64_JUMP26: {
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uint64_t X = SA - P;
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checkInt<28>(X, Type);
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or32le(Loc, (X & 0x0FFFFFFC) >> 2);
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break;
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}
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case R_AARCH64_LDST32_ABS_LO12_NC:
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or32le(Loc, (SA & 0xFFC) << 8);
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break;
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case R_AARCH64_LD64_GOT_LO12_NC:
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checkAlignment<8>(SA, Type);
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or32le(Loc, (SA & 0xFF8) << 7);
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break;
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case R_AARCH64_LDST64_ABS_LO12_NC:
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or32le(Loc, (SA & 0xFF8) << 7);
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break;
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case R_AARCH64_LDST8_ABS_LO12_NC:
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or32le(Loc, (SA & 0xFFF) << 10);
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break;
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case R_AARCH64_LDST32_ABS_LO12_NC:
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or32le(Loc, (SA & 0xFFC) << 8);
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break;
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case R_AARCH64_LDST64_ABS_LO12_NC:
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or32le(Loc, (SA & 0xFF8) << 7);
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break;
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case R_AARCH64_PREL16:
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checkIntUInt<16>(SA - P, Type);
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write16le(Loc, SA - P);
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