[InstCombine] auto-generate complete test checks; NFC
llvm-svn: 319203
This commit is contained in:
Sanjay Patel
parent
17d277b734
commit
b1a97d3774
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@ -1,14 +1,16 @@
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; RUN: opt -instcombine -S < %s | FileCheck %s
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; <rdar://problem/8606771>
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define i32 @main(i32 %argc) {
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; CHECK-LABEL: @main(
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define i32 @main(i32 %argc) nounwind ssp {
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entry:
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; CHECK-NEXT: [[TMP3151:%.*]] = trunc i32 %argc to i8
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; CHECK-NEXT: [[TMP1:%.*]] = shl i8 [[TMP3151]], 5
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; CHECK-NEXT: [[TMP4126:%.*]] = and i8 [[TMP1]], 64
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; CHECK-NEXT: [[TMP4127:%.*]] = xor i8 [[TMP4126]], 64
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; CHECK-NEXT: [[TMP4086:%.*]] = zext i8 [[TMP4127]] to i32
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; CHECK-NEXT: ret i32 [[TMP4086]]
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;
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%tmp3151 = trunc i32 %argc to i8
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; CHECK: %0 = shl i8 %tmp3151, 5
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; CHECK: and i8 %0, 64
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; CHECK-NOT: shl
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; CHECK-NOT: shr
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%tmp3161 = or i8 %tmp3151, -17
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%tmp3162 = and i8 %tmp3151, 122
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%tmp3163 = xor i8 %tmp3162, -17
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@ -18,14 +20,26 @@ entry:
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%tmp4126 = lshr i8 %tmp4120, 7
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%tmp4127 = mul i8 %tmp4126, 64
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%tmp4086 = zext i8 %tmp4127 to i32
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; CHECK: ret i32
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ret i32 %tmp4086
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}
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; rdar://8739316
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define i8 @foo(i8 %arg, i8 %arg1) {
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; CHECK-LABEL: @foo(
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define i8 @foo(i8 %arg, i8 %arg1) nounwind {
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bb:
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; CHECK-NEXT: [[TMP:%.*]] = shl i8 %arg, 7
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; CHECK-NEXT: [[TMP2:%.*]] = and i8 %arg1, 84
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; CHECK-NEXT: [[TMP3:%.*]] = and i8 %arg1, -118
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; CHECK-NEXT: [[TMP4:%.*]] = and i8 %arg1, 33
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; CHECK-NEXT: [[TMP5:%.*]] = sub nsw i8 40, [[TMP2]]
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; CHECK-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 84
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; CHECK-NEXT: [[TMP7:%.*]] = or i8 [[TMP4]], [[TMP6]]
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; CHECK-NEXT: [[TMP8:%.*]] = xor i8 [[TMP]], [[TMP3]]
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; CHECK-NEXT: [[TMP9:%.*]] = or i8 [[TMP7]], [[TMP8]]
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; CHECK-NEXT: [[TMP10:%.*]] = lshr i8 [[TMP8]], 7
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; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i8 [[TMP10]], 5
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; CHECK-NEXT: [[TMP12:%.*]] = xor i8 [[TMP11]], [[TMP9]]
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; CHECK-NEXT: ret i8 [[TMP12]]
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;
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%tmp = shl i8 %arg, 7
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%tmp2 = and i8 %arg1, 84
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%tmp3 = and i8 %arg1, -118
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@ -37,10 +51,7 @@ bb:
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%tmp9 = or i8 %tmp7, %tmp8
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%tmp10 = lshr i8 %tmp8, 7
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%tmp11 = shl i8 %tmp10, 5
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; CHECK: %tmp10 = lshr i8 %tmp8, 7
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; CHECK: %tmp11 = shl nuw nsw i8 %tmp10, 5
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%tmp12 = xor i8 %tmp11, %tmp9
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ret i8 %tmp12
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}
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@ -1,26 +1,33 @@
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; ModuleID = 'test1.c'
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; RUN: opt -S -instcombine < %s | FileCheck %s
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target triple = "x86_64-apple-macosx10.6.6"
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define zeroext i16 @foo1(i32 %on_off) nounwind uwtable ssp {
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entry:
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define zeroext i16 @foo1(i32 %on_off) {
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; CHECK-LABEL: @foo1(
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; CHECK-NEXT: [[ON_OFF_TR:%.*]] = trunc i32 %on_off to i16
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; CHECK-NEXT: [[TMP1:%.*]] = shl i16 [[ON_OFF_TR]], 1
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; CHECK-NEXT: [[CONV:%.*]] = add i16 [[TMP1]], -2
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; CHECK-NEXT: ret i16 [[CONV]]
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;
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%on_off.addr = alloca i32, align 4
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%a = alloca i32, align 4
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store i32 %on_off, i32* %on_off.addr, align 4
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%tmp = load i32, i32* %on_off.addr, align 4
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%sub = sub i32 1, %tmp
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; CHECK-NOT: mul i32
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%mul = mul i32 %sub, -2
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; CHECK: shl
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; CHECK-NEXT: add
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store i32 %mul, i32* %a, align 4
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%tmp1 = load i32, i32* %a, align 4
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%conv = trunc i32 %tmp1 to i16
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ret i16 %conv
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}
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define zeroext i16 @foo2(i32 %on_off, i32 %q) nounwind uwtable ssp {
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entry:
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define zeroext i16 @foo2(i32 %on_off, i32 %q) {
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; CHECK-LABEL: @foo2(
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; CHECK-NEXT: [[SUBA:%.*]] = sub i32 %on_off, %q
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; CHECK-NEXT: [[SUBA_TR:%.*]] = trunc i32 [[SUBA]] to i16
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; CHECK-NEXT: [[CONV:%.*]] = shl i16 [[SUBA_TR]], 2
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; CHECK-NEXT: ret i16 [[CONV]]
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;
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%on_off.addr = alloca i32, align 4
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%q.addr = alloca i32, align 4
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%a = alloca i32, align 4
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@ -29,31 +36,29 @@ entry:
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%tmp = load i32, i32* %q.addr, align 4
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%tmp1 = load i32, i32* %on_off.addr, align 4
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%sub = sub i32 %tmp, %tmp1
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; CHECK-NOT: mul i32
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%mul = mul i32 %sub, -4
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; CHECK: sub i32
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; CHECK-NEXT: trunc i32
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; CHECK-NEXT: %conv = shl i16 %{{.*}}, 2
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; CHECK-NEXT: ret i16 %conv
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store i32 %mul, i32* %a, align 4
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%tmp2 = load i32, i32* %a, align 4
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%conv = trunc i32 %tmp2 to i16
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ret i16 %conv
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}
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define zeroext i16 @foo3(i32 %on_off) nounwind uwtable ssp {
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entry:
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define zeroext i16 @foo3(i32 %on_off) {
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; CHECK-LABEL: @foo3(
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; CHECK-NEXT: [[ON_OFF_TR:%.*]] = trunc i32 %on_off to i16
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; CHECK-NEXT: [[TMP1:%.*]] = shl i16 [[ON_OFF_TR]], 2
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; CHECK-NEXT: [[CONV:%.*]] = add i16 [[TMP1]], -28
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; CHECK-NEXT: ret i16 [[CONV]]
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;
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%on_off.addr = alloca i32, align 4
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%a = alloca i32, align 4
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store i32 %on_off, i32* %on_off.addr, align 4
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%tmp = load i32, i32* %on_off.addr, align 4
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%sub = sub i32 7, %tmp
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; CHECK-NOT: mul i32
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%mul = mul i32 %sub, -4
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; CHECK: shl
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; CHECK-NEXT: add
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store i32 %mul, i32* %a, align 4
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%tmp1 = load i32, i32* %a, align 4
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%conv = trunc i32 %tmp1 to i16
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ret i16 %conv
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}
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