simplify pack and shift intrinsics with multiclasses
llvm-svn: 30797
This commit is contained in:
Chris Lattner
parent
521fc4e33f
commit
b14e6a0f8c
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@ -1516,6 +1516,35 @@ def PMINSWrm : PDI<0xEA, MRMSrcMem, (ops VR128:$dst, VR128:$src1,i128mem:$src2),
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(bitconvert (loadv2i64 addr:$src2))))]>;
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(bitconvert (loadv2i64 addr:$src2))))]>;
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let isTwoAddress = 1 in {
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multiclass PDI_binop_rm<bits<8> opc, string OpcodeStr, Intrinsic IntId> {
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def rr : PDI<opc, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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!strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2"),
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[(set VR128:$dst, (IntId VR128:$src1, VR128:$src2))]>;
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def rm : PDI<opc, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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!strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2"),
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[(set VR128:$dst, (IntId VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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}
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}
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let isTwoAddress = 1 in {
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multiclass PDI_binop_rmi<bits<8> opc, bits<8> opc2, Format ImmForm,
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string OpcodeStr, Intrinsic IntId> {
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def rr : PDI<opc, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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!strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2"),
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[(set VR128:$dst, (IntId VR128:$src1, VR128:$src2))]>;
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def rm : PDI<opc, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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!strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2"),
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[(set VR128:$dst, (IntId VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def ri : PDIi8<opc2, ImmForm, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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!strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2"),
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[(set VR128:$dst, (IntId VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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}
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}
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let isCommutable = 1 in {
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let isCommutable = 1 in {
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def PSADBWrr : PDI<0xE0, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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def PSADBWrr : PDI<0xE0, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psadbw {$src2, $dst|$dst, $src2}",
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"psadbw {$src2, $dst|$dst, $src2}",
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@ -1528,109 +1557,25 @@ def PSADBWrm : PDI<0xE0, MRMSrcMem, (ops VR128:$dst, VR128:$src1,i128mem:$src2),
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(bitconvert (loadv2i64 addr:$src2))))]>;
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(bitconvert (loadv2i64 addr:$src2))))]>;
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}
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}
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defm PSLLW : PDI_binop_rmi<0xF1, 0x71, MRM6r, "psllw", int_x86_sse2_psll_w>;
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defm PSLLD : PDI_binop_rmi<0xF2, 0x72, MRM6r, "pslld", int_x86_sse2_psll_d>;
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defm PSLLQ : PDI_binop_rmi<0xF3, 0x73, MRM6r, "psllq", int_x86_sse2_psll_q>;
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defm PSRLW : PDI_binop_rmi<0xD1, 0x71, MRM2r, "psrlw", int_x86_sse2_psrl_w>;
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defm PSRLD : PDI_binop_rmi<0xD2, 0x72, MRM2r, "psrld", int_x86_sse2_psrl_d>;
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defm PSRLQ : PDI_binop_rmi<0xD3, 0x73, MRM2r, "psrlq", int_x86_sse2_psrl_q>;
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defm PSRAW : PDI_binop_rmi<0xE1, 0x71, MRM4r, "psraw", int_x86_sse2_psra_w>;
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defm PSRAD : PDI_binop_rmi<0xE2, 0x72, MRM4r, "psrad", int_x86_sse2_psra_d>;
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// PSRAQ doesn't exist in SSE[1-3].
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let isTwoAddress = 1 in {
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let isTwoAddress = 1 in {
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def PSLLWrr : PDI<0xF1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psllw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1,
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VR128:$src2))]>;
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def PSLLWrm : PDI<0xF1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psllw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def PSLLWri : PDIi8<0x71, MRM6r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"psllw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_w VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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def PSLLDrr : PDI<0xF2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"pslld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1,
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VR128:$src2))]>;
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def PSLLDrm : PDI<0xF2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"pslld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def PSLLDri : PDIi8<0x72, MRM6r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"pslld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_d VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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def PSLLQrr : PDI<0xF3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psllq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1,
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VR128:$src2))]>;
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def PSLLQrm : PDI<0xF3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psllq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def PSLLQri : PDIi8<0x73, MRM6r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"psllq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psll_q VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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def PSLLDQri : PDIi8<0x73, MRM7r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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def PSLLDQri : PDIi8<0x73, MRM7r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"pslldq {$src2, $dst|$dst, $src2}", []>;
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"pslldq {$src2, $dst|$dst, $src2}", []>;
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def PSRLWrr : PDI<0xD1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psrlw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1,
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VR128:$src2))]>;
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def PSRLWrm : PDI<0xD1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psrlw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def PSRLWri : PDIi8<0x71, MRM2r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"psrlw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_w VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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def PSRLDrr : PDI<0xD2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psrld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1,
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VR128:$src2))]>;
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def PSRLDrm : PDI<0xD2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psrld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def PSRLDri : PDIi8<0x72, MRM2r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"psrld {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_d VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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def PSRLQrr : PDI<0xD3, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psrlq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1,
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VR128:$src2))]>;
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def PSRLQrm : PDI<0xD3, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psrlq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def PSRLQri : PDIi8<0x73, MRM2r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"psrlq {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psrl_q VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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def PSRLDQri : PDIi8<0x73, MRM3r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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def PSRLDQri : PDIi8<0x73, MRM3r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"psrldq {$src2, $dst|$dst, $src2}", []>;
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"psrldq {$src2, $dst|$dst, $src2}", []>;
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// PSRADQri doesn't exist in SSE[1-3].
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def PSRAWrr : PDI<0xE1, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psraw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1,
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VR128:$src2))]>;
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def PSRAWrm : PDI<0xE1, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psraw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def PSRAWri : PDIi8<0x71, MRM4r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"psraw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_w VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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def PSRADrr : PDI<0xE2, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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"psrad {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1,
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VR128:$src2))]>;
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def PSRADrm : PDI<0xE2, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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"psrad {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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def PSRADri : PDIi8<0x72, MRM4r, (ops VR128:$dst, VR128:$src1, i32i8imm:$src2),
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"psrad {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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}
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}
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// Logical
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// Logical
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@ -1671,28 +1616,13 @@ def PANDNrm : PDI<0xDF, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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(load addr:$src2))))]>;
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(load addr:$src2))))]>;
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}
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}
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let isTwoAddress = 1 in {
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multiclass PDI_binop_rm<bits<8> opc, string OpcodeStr, Intrinsic IntId> {
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def rr : PDI<opc, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
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!strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2"),
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[(set VR128:$dst, (IntId VR128:$src1, VR128:$src2))]>;
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def rm : PDI<opc, MRMSrcMem, (ops VR128:$dst, VR128:$src1, i128mem:$src2),
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!strconcat(OpcodeStr, " {$src2, $dst|$dst, $src2"),
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[(set VR128:$dst, (IntId VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2))))]>;
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}
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}
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// SSE2 Integer comparison
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// SSE2 Integer comparison
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let isTwoAddress = 1 in {
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defm PCMPEQB : PDI_binop_rm<0x74, "pcmpeqb", int_x86_sse2_pcmpeq_b>;
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defm PCMPEQB : PDI_binop_rm<0x74, "pcmpeqb", int_x86_sse2_pcmpeq_b>;
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defm PCMPEQW : PDI_binop_rm<0x75, "pcmpeqw", int_x86_sse2_pcmpeq_w>;
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defm PCMPEQW : PDI_binop_rm<0x75, "pcmpeqw", int_x86_sse2_pcmpeq_w>;
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defm PCMPEQD : PDI_binop_rm<0x76, "pcmpeqd", int_x86_sse2_pcmpeq_d>;
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defm PCMPEQD : PDI_binop_rm<0x76, "pcmpeqd", int_x86_sse2_pcmpeq_d>;
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defm PCMPGTB : PDI_binop_rm<0x64, "pcmpgtb", int_x86_sse2_pcmpgt_b>;
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defm PCMPGTB : PDI_binop_rm<0x64, "pcmpgtb", int_x86_sse2_pcmpgt_b>;
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defm PCMPGTW : PDI_binop_rm<0x65, "pcmpgtw", int_x86_sse2_pcmpgt_w>;
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defm PCMPGTW : PDI_binop_rm<0x65, "pcmpgtw", int_x86_sse2_pcmpgt_w>;
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defm PCMPGTD : PDI_binop_rm<0x66, "pcmpgtd", int_x86_sse2_pcmpgt_d>;
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defm PCMPGTD : PDI_binop_rm<0x66, "pcmpgtd", int_x86_sse2_pcmpgt_d>;
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}
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// Pack instructions
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// Pack instructions
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let isTwoAddress = 1 in {
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let isTwoAddress = 1 in {
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@ -1708,30 +1638,9 @@ def PACKSSWBrm : PDI<0x63, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
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[(set VR128:$dst, (v8i16 (int_x86_sse2_packsswb_128
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[(set VR128:$dst, (v8i16 (int_x86_sse2_packsswb_128
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VR128:$src1,
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VR128:$src1,
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(bitconvert (loadv2f64 addr:$src2)))))]>;
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(bitconvert (loadv2f64 addr:$src2)))))]>;
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def PACKSSDWrr : PDI<0x6B, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
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VR128:$src2),
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defm PACKSSDW : PDI_binop_rm<0x6B, "packssdw", int_x86_sse2_packssdw_128>;
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"packssdw {$src2, $dst|$dst, $src2}",
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defm PACKUSWB : PDI_binop_rm<0x67, "packuswb", int_x86_sse2_packuswb_128>;
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[(set VR128:$dst, (v4i32 (int_x86_sse2_packssdw_128
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VR128:$src1,
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VR128:$src2)))]>;
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def PACKSSDWrm : PDI<0x6B, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
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i128mem:$src2),
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"packssdw {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v4i32 (int_x86_sse2_packssdw_128
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VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2)))))]>;
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def PACKUSWBrr : PDI<0x67, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
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VR128:$src2),
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"packuswb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v8i16 (int_x86_sse2_packuswb_128
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VR128:$src1,
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VR128:$src2)))]>;
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def PACKUSWBrm : PDI<0x67, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
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i128mem:$src2),
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"packuswb {$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v8i16 (int_x86_sse2_packuswb_128
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VR128:$src1,
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(bitconvert (loadv2i64 addr:$src2)))))]>;
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}
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}
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// Shuffle and unpack instructions
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// Shuffle and unpack instructions
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Reference in New Issue