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Protect PPC Altivec patterns with a predicate 

In preparation for the addition of other SIMD ISA extensions (such as QPX) we
need to make sure that all Altivec patterns are properly predicated on having
Altivec support.

No functionality change intended (one test case needed to be updated b/c it
assumed that Altivec intrinsics would be supported without enabling Altivec
support).

llvm-svn: 177152
This commit is contained in:
Hal Finkel 2013-03-15 13:21:21 +00:00
parent e4385c4b98
commit b0fac42987
2 changed files with 7 additions and 1 deletions
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6
llvm/lib/Target/PowerPC/PPCInstrAltivec.td
View File

@ -182,6 +182,9 @@ class VX2_Int<bits<11> xo, string opc, Intrinsic IntID>
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Instruction Definitions. // Instruction Definitions.
def HasAltivec : Predicate<"PPCSubTarget.hasAltivec()">;
let Predicates = [HasAltivec] in {
def DSS : DSS_Form<822, (outs), def DSS : DSS_Form<822, (outs),
(ins u5imm:$ZERO0, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2), (ins u5imm:$ZERO0, u5imm:$STRM,u5imm:$ZERO1,u5imm:$ZERO2),
"dss $STRM", LdStLoad /*FIXME*/, []>; "dss $STRM", LdStLoad /*FIXME*/, []>;
@ -733,3 +736,6 @@ def : Pat<(v4f32 (ftrunc (v4f32 VRRC:$vA))),
(VRFIZ VRRC:$vA)>; (VRFIZ VRRC:$vA)>;
def : Pat<(v4f32 (fnearbyint (v4f32 VRRC:$vA))), def : Pat<(v4f32 (fnearbyint (v4f32 VRRC:$vA))),
(VRFIN VRRC:$vA)>; (VRFIN VRRC:$vA)>;
} // end HasAltivec

2
llvm/test/CodeGen/PowerPC/2007-09-04-AltivecDST.ll
View File

@ -1,4 +1,4 @@
; RUN: llc < %s -march=ppc64 | grep dst | count 4 ; RUN: llc < %s -march=ppc64 -mattr=+altivec | grep dst | count 4
define hidden void @_Z4borkPc(i8* %image) { define hidden void @_Z4borkPc(i8* %image) {
entry: entry: