[CostModel][X86] Include the cost of 256-bit upper subvector extract/insertion in AVX1 v4i64 MUL
Matches other MUL/ADD/SUB 256-bit case on AVX1 llvm-svn: 291149
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@ -556,9 +556,9 @@ int X86TTIImpl::getArithmeticInstrCost(
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// A v4i64 multiply is custom lowered as two split v2i64 vectors that then
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// are lowered as a series of long multiplies(3), shifts(3) and adds(2)
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// Because we believe v4i64 to be a legal type, we must also include the
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// split factor of two in the cost table. Therefore, the cost here is 16
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// extract+insert in the cost table. Therefore, the cost here is 18
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// instead of 8.
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{ ISD::MUL, MVT::v4i64, 16 },
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{ ISD::MUL, MVT::v4i64, 18 },
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};
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// Look for AVX1 lowering tricks.
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@ -436,7 +436,7 @@ define i32 @mul(i32 %arg) {
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%A = mul <2 x i64> undef, undef
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; SSSE3: cost of 16 {{.*}} %B = mul
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; SSE42: cost of 16 {{.*}} %B = mul
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; AVX: cost of 16 {{.*}} %B = mul
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; AVX: cost of 18 {{.*}} %B = mul
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; AVX2: cost of 8 {{.*}} %B = mul
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; AVX512F: cost of 8 {{.*}} %B = mul
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; AVX512BW: cost of 8 {{.*}} %B = mul
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@ -444,7 +444,7 @@ define i32 @mul(i32 %arg) {
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%B = mul <4 x i64> undef, undef
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; SSSE3: cost of 32 {{.*}} %C = mul
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; SSE42: cost of 32 {{.*}} %C = mul
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; AVX: cost of 32 {{.*}} %C = mul
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; AVX: cost of 36 {{.*}} %C = mul
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; AVX2: cost of 16 {{.*}} %C = mul
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; AVX512F: cost of 8 {{.*}} %C = mul
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; AVX512BW: cost of 8 {{.*}} %C = mul
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