PowerPC: Slight cleanup of getReservedRegs(); NFC
Change getReservedRegs() to not mark a register as reserved and then revert that decision in some cases. Motivated by the discussion in https://reviews.llvm.org/D29056 llvm-svn: 293073
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@ -234,30 +234,21 @@ BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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// The SVR4 ABI reserves r2 and r13
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if (Subtarget.isSVR4ABI()) {
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markSuperRegs(Reserved, PPC::R2); // System-reserved register
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// We only reserve r2 if we need to use the TOC pointer. If we have no
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// explicit uses of the TOC pointer (meaning we're a leaf function with
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// no constant-pool loads, etc.) and we have no potential uses inside an
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// inline asm block, then we can treat r2 has an ordinary callee-saved
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// register.
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const PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
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if (!TM.isPPC64() || FuncInfo->usesTOCBasePtr() || MF.hasInlineAsm())
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markSuperRegs(Reserved, PPC::R2); // System-reserved register
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markSuperRegs(Reserved, PPC::R13); // Small Data Area pointer register
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}
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if (TM.isPPC64()) {
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// On PPC64, r13 is the thread pointer. Never allocate this register.
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// On PPC64, r13 is the thread pointer. Never allocate this register.
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if (TM.isPPC64())
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markSuperRegs(Reserved, PPC::R13);
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// The 64-bit SVR4 ABI reserves r2 for the TOC pointer.
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if (Subtarget.isSVR4ABI()) {
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// We only reserve r2 if we need to use the TOC pointer. If we have no
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// explicit uses of the TOC pointer (meaning we're a leaf function with
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// no constant-pool loads, etc.) and we have no potential uses inside an
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// inline asm block, then we can treat r2 has an ordinary callee-saved
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// register.
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const PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
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if (!FuncInfo->usesTOCBasePtr() && !MF.hasInlineAsm()) {
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for (MCSuperRegIterator Super(PPC::R2, this, true); Super.isValid();
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++Super)
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Reserved.reset(*Super);
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}
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}
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}
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if (TFI->needsFP(MF))
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markSuperRegs(Reserved, PPC::R31);
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