Refactor the code that adds standard LLVM codegen passes into
a separate function, eliminating duplication between the add-passes-for-file and add-passes-for-machine-code code. llvm-svn: 56599
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@ -240,6 +240,12 @@ public:
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class LLVMTargetMachine : public TargetMachine {
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class LLVMTargetMachine : public TargetMachine {
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protected: // Can only create subclasses.
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protected: // Can only create subclasses.
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LLVMTargetMachine() { }
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LLVMTargetMachine() { }
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/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
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/// both emitting to assembly files or machine code output.
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///
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bool addCommonCodeGenPasses(PassManagerBase &, bool /*Fast*/);
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public:
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public:
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/// addPassesToEmitFile - Add passes to the specified pass manager to get the
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/// addPassesToEmitFile - Add passes to the specified pass manager to get the
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@ -54,92 +54,14 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
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raw_ostream &Out,
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raw_ostream &Out,
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CodeGenFileType FileType,
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CodeGenFileType FileType,
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bool Fast) {
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bool Fast) {
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// Standard LLVM-Level Passes.
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// Add common CodeGen passes.
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if (addCommonCodeGenPasses(PM, Fast))
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// Run loop strength reduction before anything else.
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if (!Fast) {
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PM.add(createLoopStrengthReducePass(getTargetLowering()));
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if (PrintLSR)
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PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
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}
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PM.add(createGCLoweringPass());
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if (!getTargetAsmInfo()->doesSupportExceptionHandling())
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PM.add(createLowerInvokePass(getTargetLowering()));
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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if (!Fast)
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PM.add(createCodeGenPreparePass(getTargetLowering()));
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if (PrintISelInput)
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PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
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&cerr));
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// Ask the target for an isel.
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if (addInstSelector(PM, Fast))
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return FileModel::Error;
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return FileModel::Error;
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// Print the instruction selected machine code...
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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if (EnableLICM)
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PM.add(createMachineLICMPass());
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if (EnableSinking)
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PM.add(createMachineSinkingPass());
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// Run pre-ra passes.
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if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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// Perform register allocation to convert to a concrete x86 representation
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PM.add(createRegisterAllocator());
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// Perform stack slot coloring.
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if (!Fast)
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PM.add(createStackSlotColoringPass());
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if (PrintMachineCode) // Print the register-allocated code
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PM.add(createMachineFunctionPrinterPass(cerr));
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// Run post-ra passes.
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if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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PM.add(createLowerSubregsPass());
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if (PrintMachineCode) // Print the subreg lowered code
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PM.add(createMachineFunctionPrinterPass(cerr));
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// Insert prolog/epilog code. Eliminate abstract frame index references...
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PM.add(createPrologEpilogCodeInserter());
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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// Second pass scheduler.
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if (!Fast && !DisablePostRAScheduler)
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PM.add(createPostRAScheduler());
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// Branch folding must be run after regalloc and prolog/epilog insertion.
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if (!Fast)
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PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
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PM.add(createGCMachineCodeAnalysisPass());
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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if (PrintGCInfo)
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PM.add(createGCInfoPrinter(*cerr));
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// Fold redundant debug labels.
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// Fold redundant debug labels.
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PM.add(createDebugLabelFoldingPass());
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PM.add(createDebugLabelFoldingPass());
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if (PrintMachineCode) // Print the register-allocated code
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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PM.add(createMachineFunctionPrinterPass(cerr));
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if (addPreEmitPass(PM, Fast) && PrintMachineCode)
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if (addPreEmitPass(PM, Fast) && PrintMachineCode)
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@ -191,6 +113,27 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
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bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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MachineCodeEmitter &MCE,
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MachineCodeEmitter &MCE,
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bool Fast) {
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bool Fast) {
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// Add common CodeGen passes.
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if (addCommonCodeGenPasses(PM, Fast))
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return true;
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if (addPreEmitPass(PM, Fast) && PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
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PM.add(createGCInfoDeleter());
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// Delete machine code for this function
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PM.add(createMachineCodeDeleter());
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return false; // success!
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}
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/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
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/// both emitting to assembly files or machine code output.
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///
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bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
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// Standard LLVM-Level Passes.
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// Standard LLVM-Level Passes.
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// Run loop strength reduction before anything else.
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// Run loop strength reduction before anything else.
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@ -215,6 +158,8 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
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PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
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&cerr));
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&cerr));
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// Standard Lower-Level Passes.
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// Ask the target for an isel.
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// Ask the target for an isel.
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if (addInstSelector(PM, Fast))
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if (addInstSelector(PM, Fast))
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return true;
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return true;
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@ -240,14 +185,14 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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if (!Fast)
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if (!Fast)
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PM.add(createStackSlotColoringPass());
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PM.add(createStackSlotColoringPass());
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if (PrintMachineCode)
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if (PrintMachineCode) // Print the register-allocated code
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PM.add(createMachineFunctionPrinterPass(cerr));
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PM.add(createMachineFunctionPrinterPass(cerr));
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// Run post-ra passes.
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// Run post-ra passes.
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if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
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if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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PM.add(createMachineFunctionPrinterPass(cerr));
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if (PrintMachineCode) // Print the register-allocated code
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(cerr));
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PM.add(createMachineFunctionPrinterPass(cerr));
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PM.add(createLowerSubregsPass());
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PM.add(createLowerSubregsPass());
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@ -262,7 +207,7 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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PM.add(createMachineFunctionPrinterPass(cerr));
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PM.add(createMachineFunctionPrinterPass(cerr));
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// Second pass scheduler.
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// Second pass scheduler.
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if (!Fast)
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if (!Fast && !DisablePostRAScheduler)
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PM.add(createPostRAScheduler());
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PM.add(createPostRAScheduler());
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// Branch folding must be run after regalloc and prolog/epilog insertion.
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// Branch folding must be run after regalloc and prolog/epilog insertion.
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@ -277,15 +222,5 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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if (PrintGCInfo)
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if (PrintGCInfo)
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PM.add(createGCInfoPrinter(*cerr));
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PM.add(createGCInfoPrinter(*cerr));
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if (addPreEmitPass(PM, Fast) && PrintMachineCode)
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return false;
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PM.add(createMachineFunctionPrinterPass(cerr));
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addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
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PM.add(createGCInfoDeleter());
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// Delete machine code for this function
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PM.add(createMachineCodeDeleter());
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return false; // success!
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}
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}
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