Fix visitTRUNCATE for legal i1 values
This extract-and-trunc vector optimization cannot work for i1 values as currently implemented, and so I'm disabling this for now for i1 values. In the future, this can be fixed properly. Soon I'll commit support for i1 CR bit tracking in the PowerPC backend, and this will be covered by one of the existing regression tests. llvm-svn: 202449
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@ -5808,7 +5808,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
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// creates this pattern) and before operation legalization after which
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// we need to be more careful about the vector instructions that we generate.
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if (N0.getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
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LegalTypes && !LegalOperations && N0->hasOneUse()) {
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LegalTypes && !LegalOperations && N0->hasOneUse() && VT != MVT::i1) {
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EVT VecTy = N0.getOperand(0).getValueType();
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EVT ExTy = N0.getValueType();
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