diff --git a/llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp b/llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp
index 4ba8091d0558..0306b06be76f 100644
--- a/llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp
+++ b/llvm/lib/Transforms/Scalar/CodeGenPrepare.cpp
@@ -636,6 +636,17 @@ bool AddressingModeMatcher::MatchOperationAddr(User *AddrInst, unsigned Opcode,
         TLI.getPointerTy())
       return MatchAddr(AddrInst->getOperand(0), Depth);
     return false;
+  case Instruction::BitCast:
+    // BitCast is always a noop, and we can handle it as long as it is
+    // int->int or pointer->pointer (we don't want int<->fp or something).
+    if ((isa<PointerType>(AddrInst->getOperand(0)->getType()) ||
+         isa<IntegerType>(AddrInst->getOperand(0)->getType())) &&
+        // Don't touch identity bitcasts.  These were probably put here by LSR,
+        // and we don't want to mess around with them.  Assume it knows what it
+        // is doing.
+        AddrInst->getOperand(0)->getType() != AddrInst->getType())
+      return MatchAddr(AddrInst->getOperand(0), Depth);
+    return false;
   case Instruction::Add: {
     // Check to see if we can merge in the RHS then the LHS.  If so, we win.
     ExtAddrMode BackupAddrMode = AddrMode;
diff --git a/llvm/test/CodeGen/X86/2008-10-16-SpillerBug.ll b/llvm/test/CodeGen/X86/2008-10-16-SpillerBug.ll
index a66073d02e4a..5caad4f5f3e8 100644
--- a/llvm/test/CodeGen/X86/2008-10-16-SpillerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-10-16-SpillerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep and | grep 7 | grep ebp
+; RUN: llvm-as < %s | llc -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*ecx}
 
 	%struct.XXDActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 }
 	%struct.XXDAlphaTest = type { float, i16, i8, i8 }
diff --git a/llvm/test/CodeGen/X86/isel-sink2.ll b/llvm/test/CodeGen/X86/isel-sink2.ll
new file mode 100644
index 000000000000..d8e27e9aff60
--- /dev/null
+++ b/llvm/test/CodeGen/X86/isel-sink2.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep {movzbl.7(%...)}
+; RUN: llvm-as < %s | llc -march=x86 | not grep leal
+
+define i8 @test(i32 *%P) nounwind {
+  %Q = getelementptr i32* %P, i32 1
+  %R = bitcast i32* %Q to i8*
+  %S = load i8* %R
+  %T = icmp eq i8 %S, 0
+  br i1 %T, label %TB, label %F
+TB:
+  ret i8 4
+F:
+  %U = getelementptr i8* %R, i32 3
+  %V = load i8* %U
+  ret i8 %V
+}