From a8c99d4dafdbffd54ded3ac96911d23d4dc306b8 Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Mon, 15 Nov 2004 21:20:09 +0000 Subject: [PATCH] Add BCTR and LWZU instruction opcodes llvm-svn: 17851 --- llvm/lib/Target/PowerPC/PowerPCInstrInfo.td | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/PowerPC/PowerPCInstrInfo.td b/llvm/lib/Target/PowerPC/PowerPCInstrInfo.td index 69cc55fc796d..da413f8a1ca4 100644 --- a/llvm/lib/Target/PowerPC/PowerPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PowerPCInstrInfo.td @@ -14,8 +14,11 @@ include "PowerPCInstrFormats.td" -let isTerminator = 1, isReturn = 1 in - def BLR : XLForm_2_ext<19, 16, 20, 31, 1, 0, 0, (ops), "blr">; +let isTerminator = 1 in { + let isReturn = 1 in + def BLR : XLForm_2_ext<19, 16, 20, 31, 1, 0, 0, (ops), "blr">; + def BCTR : XLForm_2_ext<19, 528, 20, 31, 1, 0, 0, (ops), "bctr">; +} def u5imm : Operand { let PrintMethod = "printU5ImmOperand"; @@ -98,6 +101,8 @@ def LMW : DForm_1<46, 0, 0, (ops GPRC:$rD, s16imm:$disp, GPRC:$rA), "lmw $rD, $disp($rA)">; def LWZ : DForm_1<32, 0, 0, (ops GPRC:$rD, symbolLo:$disp, GPRC:$rA), "lwz $rD, $disp($rA)">; +def LWZU : DForm_1<33, 0, 0, (ops GPRC:$rD, symbolLo:$disp, GPRC:$rA), + "lwzu $rD, $disp($rA)">; } def ADDI : DForm_2<14, 0, 0, (ops GPRC:$rD, GPRC:$rA, s16imm:$imm), "addi $rD, $rA, $imm">;