[x86] add tests for fadd reduction; NFC
More coverage for D66236. llvm-svn: 368913
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Sanjay Patel
parent
6169a73088
commit
a8ba919c01
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@ -1985,3 +1985,135 @@ define float @hadd32_16_optsize(<16 x float> %x225) optsize {
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%x230 = extractelement <16 x float> %x229, i32 0
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%x230 = extractelement <16 x float> %x229, i32 0
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ret float %x230
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ret float %x230
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}
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}
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define float @partial_reduction_fadd_v8f32(<8 x float> %x) {
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; SSE3-SLOW-LABEL: partial_reduction_fadd_v8f32:
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; SSE3-SLOW: # %bb.0:
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; SSE3-SLOW-NEXT: movaps %xmm0, %xmm1
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; SSE3-SLOW-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; SSE3-SLOW-NEXT: addps %xmm0, %xmm1
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; SSE3-SLOW-NEXT: movshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
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; SSE3-SLOW-NEXT: addss %xmm0, %xmm1
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; SSE3-SLOW-NEXT: movaps %xmm1, %xmm0
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; SSE3-SLOW-NEXT: retq
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;
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; SSE3-FAST-LABEL: partial_reduction_fadd_v8f32:
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; SSE3-FAST: # %bb.0:
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; SSE3-FAST-NEXT: movaps %xmm0, %xmm1
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; SSE3-FAST-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; SSE3-FAST-NEXT: addps %xmm0, %xmm1
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; SSE3-FAST-NEXT: haddps %xmm1, %xmm1
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; SSE3-FAST-NEXT: movaps %xmm1, %xmm0
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; SSE3-FAST-NEXT: retq
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;
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; AVX-SLOW-LABEL: partial_reduction_fadd_v8f32:
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; AVX-SLOW: # %bb.0:
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; AVX-SLOW-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
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; AVX-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-SLOW-NEXT: vzeroupper
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; AVX-SLOW-NEXT: retq
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;
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; AVX-FAST-LABEL: partial_reduction_fadd_v8f32:
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
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; AVX-FAST-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: vzeroupper
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; AVX-FAST-NEXT: retq
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%x23 = shufflevector <8 x float> %x, <8 x float> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%x0213 = fadd <8 x float> %x, %x23
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%x13 = shufflevector <8 x float> %x0213, <8 x float> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%x0123 = fadd nsz reassoc <8 x float> %x0213, %x13
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%r = extractelement <8 x float> %x0123, i32 0
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ret float %r
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}
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define float @partial_reduction_fadd_v8f32_wrong_flags(<8 x float> %x) {
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; SSE3-SLOW-LABEL: partial_reduction_fadd_v8f32_wrong_flags:
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; SSE3-SLOW: # %bb.0:
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; SSE3-SLOW-NEXT: movaps %xmm0, %xmm1
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; SSE3-SLOW-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; SSE3-SLOW-NEXT: addps %xmm0, %xmm1
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; SSE3-SLOW-NEXT: movshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
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; SSE3-SLOW-NEXT: addss %xmm0, %xmm1
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; SSE3-SLOW-NEXT: movaps %xmm1, %xmm0
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; SSE3-SLOW-NEXT: retq
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;
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; SSE3-FAST-LABEL: partial_reduction_fadd_v8f32_wrong_flags:
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; SSE3-FAST: # %bb.0:
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; SSE3-FAST-NEXT: movaps %xmm0, %xmm1
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; SSE3-FAST-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; SSE3-FAST-NEXT: addps %xmm0, %xmm1
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; SSE3-FAST-NEXT: haddps %xmm1, %xmm1
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; SSE3-FAST-NEXT: movaps %xmm1, %xmm0
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; SSE3-FAST-NEXT: retq
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;
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; AVX-SLOW-LABEL: partial_reduction_fadd_v8f32_wrong_flags:
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; AVX-SLOW: # %bb.0:
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; AVX-SLOW-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
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; AVX-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-SLOW-NEXT: vzeroupper
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; AVX-SLOW-NEXT: retq
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;
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; AVX-FAST-LABEL: partial_reduction_fadd_v8f32_wrong_flags:
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
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; AVX-FAST-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: vzeroupper
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; AVX-FAST-NEXT: retq
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%x23 = shufflevector <8 x float> %x, <8 x float> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%x0213 = fadd fast <8 x float> %x, %x23
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%x13 = shufflevector <8 x float> %x0213, <8 x float> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%x0123 = fadd ninf nnan <8 x float> %x0213, %x13
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%r = extractelement <8 x float> %x0123, i32 0
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ret float %r
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}
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define float @partial_reduction_fadd_v16f32(<16 x float> %x) {
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; SSE3-SLOW-LABEL: partial_reduction_fadd_v16f32:
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; SSE3-SLOW: # %bb.0:
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; SSE3-SLOW-NEXT: movaps %xmm0, %xmm1
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; SSE3-SLOW-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; SSE3-SLOW-NEXT: addps %xmm0, %xmm1
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; SSE3-SLOW-NEXT: movshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
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; SSE3-SLOW-NEXT: addss %xmm0, %xmm1
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; SSE3-SLOW-NEXT: movaps %xmm1, %xmm0
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; SSE3-SLOW-NEXT: retq
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;
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; SSE3-FAST-LABEL: partial_reduction_fadd_v16f32:
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; SSE3-FAST: # %bb.0:
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; SSE3-FAST-NEXT: movaps %xmm0, %xmm1
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; SSE3-FAST-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
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; SSE3-FAST-NEXT: addps %xmm0, %xmm1
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; SSE3-FAST-NEXT: haddps %xmm1, %xmm1
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; SSE3-FAST-NEXT: movaps %xmm1, %xmm0
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; SSE3-FAST-NEXT: retq
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;
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; AVX-SLOW-LABEL: partial_reduction_fadd_v16f32:
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; AVX-SLOW: # %bb.0:
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; AVX-SLOW-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
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; AVX-SLOW-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-SLOW-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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; AVX-SLOW-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-SLOW-NEXT: vzeroupper
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; AVX-SLOW-NEXT: retq
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;
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; AVX-FAST-LABEL: partial_reduction_fadd_v16f32:
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; AVX-FAST: # %bb.0:
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; AVX-FAST-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
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; AVX-FAST-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-FAST-NEXT: vhaddps %xmm0, %xmm0, %xmm0
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; AVX-FAST-NEXT: vzeroupper
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; AVX-FAST-NEXT: retq
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%x23 = shufflevector <16 x float> %x, <16 x float> undef, <16 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%x0213 = fadd <16 x float> %x, %x23
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%x13 = shufflevector <16 x float> %x0213, <16 x float> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%x0123 = fadd reassoc nsz <16 x float> %x0213, %x13
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%r = extractelement <16 x float> %x0123, i32 0
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ret float %r
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}
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