replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes. 

Code beautification for the rest of the code: changed layout to match the rest
of the code base.

llvm-svn: 6446
This commit is contained in:
Misha Brukman 2003-05-30 20:11:56 +00:00
parent c1830a472a
commit a853af587a
2 changed files with 450 additions and 441 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

812
llvm/lib/Target/Sparc/SparcInstrSelection.cpp
View File

File diff suppressed because it is too large Load Diff

79
llvm/lib/Target/Sparc/SparcInstrSelectionSupport.h
View File

@ -8,6 +8,7 @@
#define SPARC_INSTR_SELECTION_SUPPORT_h
#include "llvm/DerivedTypes.h"
#include "SparcInternals.h"
inline MachineOpCode
ChooseLoadInstruction(const Type *DestTy)
@ -77,4 +78,82 @@ ChooseAddInstructionByType(const Type* resultType)
return opCode;
}
static unsigned
convertOpcodeFromRegToImm(unsigned Opcode) {
switch (Opcode) {
/* arithmetic */
case V9::ADDr: return V9::ADDi;
case V9::ADDccr: return V9::ADDcci;
case V9::ADDCr: return V9::ADDCi;
case V9::ADDCccr: return V9::ADDCcci;
case V9::SUBr: return V9::SUBi;
case V9::SUBccr: return V9::SUBcci;
case V9::SUBCr: return V9::SUBCi;
case V9::SUBCccr: return V9::SUBCcci;
case V9::MULXr: return V9::MULXi;
case V9::SDIVXr: return V9::SDIVXi;
case V9::UDIVXr: return V9::UDIVXi;
/* logical */
case V9::ANDr: return V9::ANDi;
case V9::ANDccr: return V9::ANDcci;
case V9::ANDNr: return V9::ANDNi;
case V9::ANDNccr: return V9::ANDNcci;
case V9::ORr: return V9::ORi;
case V9::ORccr: return V9::ORcci;
case V9::ORNr: return V9::ORNi;
case V9::ORNccr: return V9::ORNcci;
case V9::XORr: return V9::XORi;
case V9::XORccr: return V9::XORcci;
case V9::XNORr: return V9::XNORi;
case V9::XNORccr: return V9::XNORcci;
/* shift */
case V9::SLLr6: return V9::SLLi6;
case V9::SRLr6: return V9::SRLi6;
case V9::SRAr6: return V9::SRAi6;
case V9::SLLXr6: return V9::SLLXi6;
case V9::SRLXr6: return V9::SRLXi6;
case V9::SRAXr6: return V9::SRAXi6;
/* load */
case V9::LDSBr: return V9::LDSBi;
case V9::LDSHr: return V9::LDSHi;
case V9::LDSWr: return V9::LDSWi;
case V9::LDUBr: return V9::LDUBi;
case V9::LDUHr: return V9::LDUHi;
case V9::LDUWr: return V9::LDUWi;
case V9::LDXr: return V9::LDXi;
case V9::LDFr: return V9::LDFi;
case V9::LDDFr: return V9::LDDFi;
case V9::LDQFr: return V9::LDQFi;
case V9::LDFSRr: return V9::LDFSRi;
case V9::LDXFSRr: return V9::LDXFSRi;
/* store */
case V9::STBr: return V9::STBi;
case V9::STHr: return V9::STHi;
case V9::STWr: return V9::STWi;
case V9::STXr: return V9::STXi;
case V9::STFr: return V9::STFi;
case V9::STDFr: return V9::STDFi;
case V9::STFSRr: return V9::STFSRi;
case V9::STXFSRr: return V9::STXFSRi;
/* jump & return */
case V9::JMPLCALLr: return V9::JMPLCALLi;
case V9::JMPLRETr: return V9::JMPLRETi;
case V9::RETURNr: return V9::RETURNi;
/* save and restore */
case V9::SAVEr: return V9::SAVEi;
case V9::RESTOREr: return V9::RESTOREi;
default:
// It's already in correct format
return Opcode;
}
}
#endif