AMDGPU: Remove brev intrinsic

llvm-svn: 275620
This commit is contained in:
Matt Arsenault 2016-07-15 21:27:13 +00:00
parent 82e5e1e564
commit a65e6b8335
3 changed files with 0 additions and 16 deletions

View File

@ -937,9 +937,6 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
Op.getOperand(1), Op.getOperand(1),
Op.getOperand(2), Op.getOperand(2),
Op.getOperand(3)); Op.getOperand(3));
case AMDGPUIntrinsic::AMDGPU_brev: // Legacy name
return DAG.getNode(ISD::BITREVERSE, DL, VT, Op.getOperand(1));
} }
} }

View File

@ -30,9 +30,6 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in {
[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem] [llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]
>; >;
// Deprecated in favor of llvm.bitreverse
def int_AMDGPU_brev : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
// Deprecated in favor of llvm.amdgcn.s.barrier // Deprecated in favor of llvm.amdgcn.s.barrier
def int_AMDGPU_barrier_local : Intrinsic<[], [], [IntrConvergent]>; def int_AMDGPU_barrier_local : Intrinsic<[], [], [IntrConvergent]>;
def int_AMDGPU_barrier_global : Intrinsic<[], [], [IntrConvergent]>; def int_AMDGPU_barrier_global : Intrinsic<[], [], [IntrConvergent]>;

View File

@ -11,8 +11,6 @@ declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>) #1
declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1 declare <2 x i64> @llvm.bitreverse.v2i64(<2 x i64>) #1
declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1 declare <4 x i64> @llvm.bitreverse.v4i64(<4 x i64>) #1
declare i32 @llvm.AMDGPU.brev(i32) #1
; FUNC-LABEL: {{^}}s_brev_i16: ; FUNC-LABEL: {{^}}s_brev_i16:
; SI: s_brev_b32 ; SI: s_brev_b32
define void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 { define void @s_brev_i16(i16 addrspace(1)* noalias %out, i16 %val) #0 {
@ -103,13 +101,5 @@ define void @v_brev_v2i64(<2 x i64> addrspace(1)* noalias %out, <2 x i64> addrsp
ret void ret void
} }
; FUNC-LABEL: {{^}}legacy_s_brev_i32:
; SI: s_brev_b32
define void @legacy_s_brev_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
%brev = call i32 @llvm.AMDGPU.brev(i32 %val) #1
store i32 %brev, i32 addrspace(1)* %out
ret void
}
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }