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Added release notes for MIPS. 

llvm-svn: 213749
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Daniel Sanders 2014-07-23 12:59:26 +00:00
parent 35910d7fa8
commit a4d18fc606
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llvm/docs/ReleaseNotes.rst
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@ -47,7 +47,7 @@ Non-comprehensive list of changes in this release
* All inline assembly is parsed by the integrated assembler when it is enabled.
Previously this was only the case for object-file output. It is now the case
for assembly output as well. The integrated assembler can be disabled with
the ``-no-integrated-as`` option,
the ``-no-integrated-as`` option.
* llvm-ar now handles IR files like regular object files. In particular, a
regular symbol table is created for symbols defined in IR files, including
@ -115,6 +115,74 @@ debug/profiling), or both. To avoid run-time inconsistencies, C code will
also emit EH tables (in case they interoperate with C++ code), as is the
case for other architectures (ex. x86_64).
Changes to the MIPS Target
--------------------------
There has been a large amount of improvements to the MIPS target which can be
broken down into subtarget, ABI, and Integrated Assembler changes.
Subtargets
^^^^^^^^^^
Added support for Release 6 of the MIPS32 and MIPS64 architecture (MIPS32r6
and MIPS64r6). Release 6 makes a number of significant changes to the MIPS32
and MIPS64 architectures. For example, FPU registers are always 64-bits wide,
FPU NaN values conform to IEEE 754 (2008), and the unaligned memory instructions
(such as lwl and lwr) have been replaced with a requirement for ordinary memory
operations to support unaligned operations. Full details of MIPS32 and MIPS64
Release 6 can be found on the `MIPS64 Architecture page at Imagination
Technologies <http://www.imgtec.com/mips/architectures/mips64.asp>`_.
This release also adds experimental support for MIPS-IV, cnMIPS, and Cavium
Octeon CPU's.
Support for the MIPS SIMD Architecture (MSA) has been improved to support MSA
on MIPS64.
Support for IEEE 754 (2008) NaN values has been added.
ABI and ABI extensions
^^^^^^^^^^^^^^^^^^^^^^
There has also been considerable ABI work since the 3.4 release. This release
adds support for the N32 ABI, the O32-FPXX ABI Extension, the O32-FP64 ABI
Extension, and the O32-FP64A ABI Extension.
The N32 ABI is an existing ABI that has now been implemented in LLVM. It is a
64-bit ABI that is similar to N64 but retains 32-bit pointers. N64 remains the
default 64-bit ABI in LLVM. This differs from GCC where N32 is the default
64-bit ABI.
The O32-FPXX ABI Extension is 100% compatible with the O32-ABI and the O32-FP64
ABI Extension and may be linked with either but may not be linked with both of
these simultaneously. It extends the O32 ABI to allow the same code to execute
without modification on processors with 32-bit FPU registers as well as 64-bit
FPU registers. The O32-FPXX ABI Extension is enabled by default for the O32 ABI
on mips*-img-linux-gnu and mips*-mti-linux-gnu triples and is selected with
-mfpxx. It is expected that future releases of LLVM will enable the FPXX
Extension for O32 on all triples.
The O32-FP64 ABI Extension is an extension to the O32 ABI to fully exploit FPU's
with 64-bit registers and is enabled with -mfp64. This replaces an undocumented
and unsupported O32 extension which was previously enabled with -mfp64. It is
100% compatible with the O32-FPXX ABI Extension.
The O32-FP64A ABI Extension is a restricted form of the O32-FP64 ABI Extension
which allows interlinking with unmodified binaries that use the base O32 ABI.
Integrated Assembler
^^^^^^^^^^^^^^^^^^^^
The MIPS Integrated Assembler has undergone a substantial overhaul including a
rewrite of the assembly parser. It's not ready for general use in this release
but adventurous users may wish to enable it using ``-fintegrated-as``.
In this release, the integrated assembler supports the majority of MIPS-I,
MIPS-II, MIPS-III, MIPS-IV, MIPS-V, MIPS32, MIPS32r2, MIPS32r6, MIPS64,
MIPS64r2, and MIPS64r6 as well as some of the Application Specific Extensions
such as MSA. It also supports several of the MIPS specific assembler directives
such as ``.set``, ``.module``, ``.cpload``, etc.
External Open Source Projects Using LLVM 3.5
============================================