Enable a couple of xforms:
- (store (bitconvert v)) -> (store v) if resultant store does not require higher alignment - (bitconvert (load v)) -> (load (bitconvert*)v) if resultant load does not require higher alignment llvm-svn: 36908
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@ -34,7 +34,9 @@
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/CommandLine.h"
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@ -2569,10 +2571,14 @@ SDOperand DAGCombiner::visitBIT_CONVERT(SDNode *N) {
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return DAG.getNode(ISD::BIT_CONVERT, VT, N0.getOperand(0));
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return DAG.getNode(ISD::BIT_CONVERT, VT, N0.getOperand(0));
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// fold (conv (load x)) -> (load (conv*)x)
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// fold (conv (load x)) -> (load (conv*)x)
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// FIXME: These xforms need to know that the resultant load doesn't need a
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// If the resultant load doesn't need a higher alignment than the original!
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// higher alignment than the original!
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if (ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse() &&
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if (0 && ISD::isNON_EXTLoad(N0.Val) && N0.hasOneUse()) {
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TLI.isOperationLegal(ISD::LOAD, VT)) {
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LoadSDNode *LN0 = cast<LoadSDNode>(N0);
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LoadSDNode *LN0 = cast<LoadSDNode>(N0);
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unsigned Align = TLI.getTargetMachine().getTargetData()->
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getPrefTypeAlignment(getTypeForValueType(VT));
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unsigned OrigAlign = LN0->getAlignment();
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if (Align <= OrigAlign) {
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SDOperand Load = DAG.getLoad(VT, LN0->getChain(), LN0->getBasePtr(),
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SDOperand Load = DAG.getLoad(VT, LN0->getChain(), LN0->getBasePtr(),
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LN0->getSrcValue(), LN0->getSrcValueOffset(),
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LN0->getSrcValue(), LN0->getSrcValueOffset(),
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LN0->isVolatile(), LN0->getAlignment());
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LN0->isVolatile(), LN0->getAlignment());
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@ -2581,6 +2587,7 @@ SDOperand DAGCombiner::visitBIT_CONVERT(SDNode *N) {
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Load.getValue(1));
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Load.getValue(1));
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return Load;
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return Load;
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}
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}
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}
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return SDOperand();
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return SDOperand();
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}
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}
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@ -3414,10 +3421,14 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
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SDOperand Value = ST->getValue();
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SDOperand Value = ST->getValue();
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SDOperand Ptr = ST->getBasePtr();
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SDOperand Ptr = ST->getBasePtr();
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// If this is a store of a bit convert, store the input value.
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// If this is a store of a bit convert, store the input value if the
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// FIXME: This needs to know that the resultant store does not need a
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// resultant store does not need a higher alignment than the original.
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// higher alignment than the original.
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if (Value.getOpcode() == ISD::BIT_CONVERT) {
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if (0 && Value.getOpcode() == ISD::BIT_CONVERT) {
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unsigned Align = ST->getAlignment();
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MVT::ValueType SVT = Value.getOperand(0).getValueType();
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unsigned OrigAlign = TLI.getTargetMachine().getTargetData()->
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getPrefTypeAlignment(getTypeForValueType(SVT));
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if (Align <= OrigAlign)
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return DAG.getStore(Chain, Value.getOperand(0), Ptr, ST->getSrcValue(),
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return DAG.getStore(Chain, Value.getOperand(0), Ptr, ST->getSrcValue(),
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ST->getSrcValueOffset());
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ST->getSrcValueOffset());
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}
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}
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