Make DwarfExpression store the AsmPrinter instead of the TargetMachine.
NFC. llvm-svn: 225731
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@ -133,6 +133,7 @@ public:
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virtual ~AsmPrinter();
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virtual ~AsmPrinter();
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DwarfDebug *getDwarfDebug() { return DD; }
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DwarfDebug *getDwarfDebug() { return DD; }
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DwarfDebug *getDwarfDebug() const { return DD; }
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/// Return true if assembly output should contain comments.
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/// Return true if assembly output should contain comments.
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///
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///
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@ -37,8 +37,8 @@ class DebugLocDwarfExpression : public DwarfExpression {
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ByteStreamer &BS;
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ByteStreamer &BS;
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public:
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public:
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DebugLocDwarfExpression(TargetMachine &TM, ByteStreamer &BS)
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DebugLocDwarfExpression(const AsmPrinter &AP, ByteStreamer &BS)
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: DwarfExpression(TM), BS(BS) {}
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: DwarfExpression(AP), BS(BS) {}
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void EmitOp(uint8_t Op, const char *Comment) override;
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void EmitOp(uint8_t Op, const char *Comment) override;
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void EmitSigned(int Value) override;
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void EmitSigned(int Value) override;
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@ -222,14 +222,14 @@ void AsmPrinter::EmitDwarfRegOpPiece(ByteStreamer &Streamer,
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unsigned PieceSizeInBits,
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unsigned PieceSizeInBits,
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unsigned PieceOffsetInBits) const {
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unsigned PieceOffsetInBits) const {
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assert(MLoc.isReg() && "MLoc must be a register");
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assert(MLoc.isReg() && "MLoc must be a register");
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DebugLocDwarfExpression Expr(TM, Streamer);
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DebugLocDwarfExpression Expr(*this, Streamer);
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Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
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Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
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}
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}
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void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
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void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
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unsigned PieceSizeInBits,
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unsigned PieceSizeInBits,
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unsigned PieceOffsetInBits) const {
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unsigned PieceOffsetInBits) const {
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DebugLocDwarfExpression Expr(TM, Streamer);
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DebugLocDwarfExpression Expr(*this, Streamer);
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Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
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Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
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}
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}
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@ -237,7 +237,7 @@ void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
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void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
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void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
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const MachineLocation &MLoc,
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const MachineLocation &MLoc,
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bool Indirect) const {
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bool Indirect) const {
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DebugLocDwarfExpression Expr(TM, Streamer);
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DebugLocDwarfExpression Expr(*this, Streamer);
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const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
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const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
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int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
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int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
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if (Reg < 0) {
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if (Reg < 0) {
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@ -12,7 +12,10 @@
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#include "DwarfExpression.h"
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#include "DwarfExpression.h"
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#include "DwarfDebug.h"
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#include "llvm/ADT/SmallBitVector.h"
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#include "llvm/ADT/SmallBitVector.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/Support/Dwarf.h"
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#include "llvm/Support/Dwarf.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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@ -21,6 +24,10 @@
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using namespace llvm;
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using namespace llvm;
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const TargetRegisterInfo *DwarfExpression::getTRI() const {
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return AP.TM.getSubtargetImpl()->getRegisterInfo();
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}
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void DwarfExpression::AddReg(int DwarfReg, const char* Comment) {
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void DwarfExpression::AddReg(int DwarfReg, const char* Comment) {
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assert(DwarfReg >= 0 && "invalid negative dwarf register number");
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assert(DwarfReg >= 0 && "invalid negative dwarf register number");
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if (DwarfReg < 32) {
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if (DwarfReg < 32) {
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@ -66,8 +73,7 @@ void DwarfExpression::AddShr(unsigned ShiftBy) {
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}
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}
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bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
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bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
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const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
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int DwarfReg = getTRI()->getDwarfRegNum(MachineReg, false);
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int DwarfReg = TRI->getDwarfRegNum(MachineReg, false);
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if (DwarfReg < 0)
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if (DwarfReg < 0)
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return false;
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return false;
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@ -84,7 +90,7 @@ bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
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void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
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void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
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unsigned PieceSizeInBits,
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unsigned PieceSizeInBits,
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unsigned PieceOffsetInBits) {
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unsigned PieceOffsetInBits) {
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const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
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const TargetRegisterInfo *TRI = getTRI();
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int Reg = TRI->getDwarfRegNum(MachineReg, false);
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int Reg = TRI->getDwarfRegNum(MachineReg, false);
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// If this is a valid register number, emit it.
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// If this is a valid register number, emit it.
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@ -18,16 +18,20 @@
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namespace llvm {
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namespace llvm {
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class TargetMachine;
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class AsmPrinter;
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class TargetRegisterInfo;
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/// Base class containing the logic for constructing DWARF expressions
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/// Base class containing the logic for constructing DWARF expressions
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/// independently of whether they are emitted into a DIE or into a .debug_loc
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/// independently of whether they are emitted into a DIE or into a .debug_loc
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/// entry.
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/// entry.
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class DwarfExpression {
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class DwarfExpression {
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protected:
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protected:
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TargetMachine &TM;
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const AsmPrinter &AP;
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// Various convenience accessors that extract things out of AsmPrinter.
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const TargetRegisterInfo *getTRI() const;
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public:
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public:
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DwarfExpression(TargetMachine &TM) : TM(TM) {}
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DwarfExpression(const AsmPrinter &AP) : AP(AP) {}
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virtual ~DwarfExpression() {}
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virtual ~DwarfExpression() {}
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virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
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virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
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@ -49,8 +49,8 @@ class DIEDwarfExpression : public DwarfExpression {
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DwarfUnit &DU;
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DwarfUnit &DU;
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DIELoc &DIE;
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DIELoc &DIE;
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public:
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public:
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DIEDwarfExpression(TargetMachine &TM, DwarfUnit &DU, DIELoc &DIE)
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DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE)
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: DwarfExpression(TM), DU(DU), DIE(DIE) {}
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: DwarfExpression(AP), DU(DU), DIE(DIE) {}
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void EmitOp(uint8_t Op, const char* Comment = nullptr) override;
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void EmitOp(uint8_t Op, const char* Comment = nullptr) override;
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void EmitSigned(int Value) override;
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void EmitSigned(int Value) override;
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@ -68,8 +68,7 @@ void DIEDwarfExpression::EmitUnsigned(unsigned Value) {
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DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
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DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
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}
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}
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unsigned DIEDwarfExpression::getFrameRegister() {
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unsigned DIEDwarfExpression::getFrameRegister() {
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const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
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return getTRI()->getFrameRegister(*AP.MF);
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return TRI->getFrameRegister(*DU.getAsmPrinter()->MF);
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}
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}
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@ -431,7 +430,7 @@ void DwarfUnit::addSourceLine(DIE &Die, DINameSpace NS) {
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/// addRegisterOp - Add register operand.
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/// addRegisterOp - Add register operand.
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bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
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bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
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unsigned SizeInBits, unsigned OffsetInBits) {
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unsigned SizeInBits, unsigned OffsetInBits) {
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DIEDwarfExpression Expr(Asm->TM, *this, TheDie);
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DIEDwarfExpression Expr(*Asm, *this, TheDie);
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Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits);
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Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits);
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return true;
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return true;
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}
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}
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@ -439,7 +438,7 @@ bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
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/// addRegisterOffset - Add register offset.
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/// addRegisterOffset - Add register offset.
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bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
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bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
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int64_t Offset) {
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int64_t Offset) {
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DIEDwarfExpression Expr(Asm->TM, *this, TheDie);
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DIEDwarfExpression Expr(*Asm, *this, TheDie);
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return Expr.AddMachineRegIndirect(Reg, Offset);
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return Expr.AddMachineRegIndirect(Reg, Offset);
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}
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}
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