[Hexagon] Speed up frame lowering when no optimizations are enabled
- Do not optimize stack slots in optnone functions. - Get aligned-base register from HexagonMachineFunctionInfo instead of looking for ALIGNA instruction in the function's body. llvm-svn: 264580
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@ -287,6 +287,20 @@ namespace {
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return true;
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return false;
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}
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inline bool isOptNone(const MachineFunction &MF) {
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return MF.getFunction()->hasFnAttribute(Attribute::OptimizeNone) ||
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MF.getTarget().getOptLevel() == CodeGenOpt::None;
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}
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inline bool isOptSize(const MachineFunction &MF) {
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const Function &F = *MF.getFunction();
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return F.optForSize() && !F.optForMinSize();
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}
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inline bool isMinSize(const MachineFunction &MF) {
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return MF.getFunction()->optForMinSize();
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}
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}
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@ -864,9 +878,8 @@ int HexagonFrameLowering::getFrameIndexReference(const MachineFunction &MF,
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bool NoOpt = MF.getTarget().getOptLevel() == CodeGenOpt::None;
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unsigned SP = HRI.getStackRegister(), FP = HRI.getFrameRegister();
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unsigned AP = 0;
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if (const MachineInstr *AI = getAlignaInstr(MF))
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AP = AI->getOperand(0).getReg();
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auto &HMFI = *MF.getInfo<HexagonMachineFunctionInfo>();
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unsigned AP = HMFI.getStackAlignBasePhysReg();
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unsigned FrameSize = MFI.getStackSize();
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bool UseFP = false, UseAP = false; // Default: use SP (except at -O0).
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@ -1089,6 +1102,13 @@ void HexagonFrameLowering::processFunctionBeforeFrameFinalized(
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if (A == 0)
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MFI->setLocalFrameMaxAlign(8);
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MFI->setUseLocalStackAllocationBlock(true);
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// Set the physical aligned-stack base address register.
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unsigned AP = 0;
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if (const MachineInstr *AI = getAlignaInstr(MF))
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AP = AI->getOperand(0).getReg();
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auto &HMFI = *MF.getInfo<HexagonMachineFunctionInfo>();
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HMFI.setStackAlignBasePhysReg(AP);
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}
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/// Returns true if there is no caller saved registers available.
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@ -1680,7 +1700,7 @@ void HexagonFrameLowering::determineCalleeSaves(MachineFunction &MF,
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// Replace predicate register pseudo spill code.
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SmallVector<unsigned,8> NewRegs;
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expandSpillMacros(MF, NewRegs);
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if (OptimizeSpillSlots)
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if (OptimizeSpillSlots && !isOptNone(MF))
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optimizeSpillSlots(MF, NewRegs);
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// We need to reserve a a spill slot if scavenging could potentially require
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@ -2145,18 +2165,6 @@ const MachineInstr *HexagonFrameLowering::getAlignaInstr(
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}
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// FIXME: Use Function::optForSize().
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inline static bool isOptSize(const MachineFunction &MF) {
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AttributeSet AF = MF.getFunction()->getAttributes();
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return AF.hasAttribute(AttributeSet::FunctionIndex,
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Attribute::OptimizeForSize);
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}
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inline static bool isMinSize(const MachineFunction &MF) {
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return MF.getFunction()->optForMinSize();
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}
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/// Determine whether the callee-saved register saves and restores should
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/// be generated via inline code. If this function returns "true", inline
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/// code will be generated. If this function returns "false", additional
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@ -27,7 +27,8 @@ class HexagonMachineFunctionInfo : public MachineFunctionInfo {
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// returning the value of the returned struct in a register. This field
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// holds the virtual register into which the sret argument is passed.
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unsigned SRetReturnReg;
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unsigned StackAlignBaseReg;
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unsigned StackAlignBaseVReg; // Aligned-stack base register (virtual)
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unsigned StackAlignBasePhysReg; // (physical)
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std::vector<MachineInstr*> AllocaAdjustInsts;
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int VarArgsFrameIndex;
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bool HasClobberLR;
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@ -36,13 +37,12 @@ class HexagonMachineFunctionInfo : public MachineFunctionInfo {
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virtual void anchor();
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public:
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HexagonMachineFunctionInfo() : SRetReturnReg(0), StackAlignBaseReg(0),
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HasClobberLR(0), HasEHReturn(false) {}
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HexagonMachineFunctionInfo() : SRetReturnReg(0), StackAlignBaseVReg(0),
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StackAlignBasePhysReg(0), HasClobberLR(0), HasEHReturn(false) {}
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HexagonMachineFunctionInfo(MachineFunction &MF) : SRetReturnReg(0),
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StackAlignBaseReg(0),
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HasClobberLR(0),
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HasEHReturn(false) {}
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StackAlignBaseVReg(0), StackAlignBasePhysReg(0), HasClobberLR(0),
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HasEHReturn(false) {}
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unsigned getSRetReturnReg() const { return SRetReturnReg; }
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void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
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@ -77,8 +77,11 @@ public:
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bool hasEHReturn() const { return HasEHReturn; };
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void setHasEHReturn(bool H = true) { HasEHReturn = H; };
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void setStackAlignBaseVReg(unsigned R) { StackAlignBaseReg = R; }
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unsigned getStackAlignBaseVReg() const { return StackAlignBaseReg; }
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void setStackAlignBaseVReg(unsigned R) { StackAlignBaseVReg = R; }
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unsigned getStackAlignBaseVReg() const { return StackAlignBaseVReg; }
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void setStackAlignBasePhysReg(unsigned R) { StackAlignBasePhysReg = R; }
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unsigned getStackAlignBasePhysReg() const { return StackAlignBasePhysReg; }
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};
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} // End llvm namespace
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