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AMDGPU/R600: Initialize more passes 

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D36128

llvm-svn: 309893
This commit is contained in:
Tom Stellard 2017-08-02 22:19:45 +00:00
parent a0213850e5
commit a2f57be260
7 changed files with 68 additions and 8 deletions
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15
llvm/lib/Target/AMDGPU/AMDGPU.h
View File

@ -70,6 +70,21 @@ extern char &AMDGPULowerIntrinsicsID;
void initializeAMDGPURewriteOutArgumentsPass(PassRegistry &);
extern char &AMDGPURewriteOutArgumentsID;
void initializeR600ClauseMergePassPass(PassRegistry &);
extern char &R600ClauseMergePassID;
void initializeR600ControlFlowFinalizerPass(PassRegistry &);
extern char &R600ControlFlowFinalizerID;
void initializeR600ExpandSpecialInstrsPassPass(PassRegistry &);
extern char &R600ExpandSpecialInstrsPassID;
void initializeR600VectorRegMergerPass(PassRegistry &);
extern char &R600VectorRegMergerID;
void initializeR600PacketizerPass(PassRegistry &);
extern char &R600PacketizerID;
void initializeSIFoldOperandsPass(PassRegistry &);
extern char &SIFoldOperandsID;

5
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
View File

@ -135,6 +135,11 @@ extern "C" void LLVMInitializeAMDGPUTarget() {
RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget());
PassRegistry *PR = PassRegistry::getPassRegistry();
initializeR600ClauseMergePassPass(*PR);
initializeR600ControlFlowFinalizerPass(*PR);
initializeR600PacketizerPass(*PR);
initializeR600ExpandSpecialInstrsPassPass(*PR);
initializeR600VectorRegMergerPass(*PR);
initializeSILowerI1CopiesPass(*PR);
initializeSIFixSGPRCopiesPass(*PR);
initializeSIFixVGPRCopiesPass(*PR);

15
llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
View File

@ -44,7 +44,6 @@ static bool isCFAlu(const MachineInstr &MI) {
class R600ClauseMergePass : public MachineFunctionPass {
private:
static char ID;
const R600InstrInfo *TII;
unsigned getCFAluSize(const MachineInstr &MI) const;
@ -62,6 +61,8 @@ private:
const MachineInstr &LatrCFAlu) const;
public:
static char ID;
R600ClauseMergePass() : MachineFunctionPass(ID) { }
bool runOnMachineFunction(MachineFunction &MF) override;
@ -69,8 +70,17 @@ public:
StringRef getPassName() const override;
};
} // end anonymous namespace
INITIALIZE_PASS_BEGIN(R600ClauseMergePass, DEBUG_TYPE,
"R600 Clause Merge", false, false)
INITIALIZE_PASS_END(R600ClauseMergePass, DEBUG_TYPE,
"R600 Clause Merge", false, false)
char R600ClauseMergePass::ID = 0;
char &llvm::R600ClauseMergePassID = R600ClauseMergePass::ID;
unsigned R600ClauseMergePass::getCFAluSize(const MachineInstr &MI) const {
assert(isCFAlu(MI));
return MI
@ -205,9 +215,6 @@ StringRef R600ClauseMergePass::getPassName() const {
return "R600 Merge Clause Markers Pass";
}
} // end anonymous namespace
llvm::FunctionPass *llvm::createR600ClauseMergePass() {
return new R600ClauseMergePass();
}

12
llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
View File

@ -230,7 +230,6 @@ private:
CF_END
};
static char ID;
const R600InstrInfo *TII = nullptr;
const R600RegisterInfo *TRI = nullptr;
unsigned MaxFetchInst;
@ -499,6 +498,8 @@ private:
}
public:
static char ID;
R600ControlFlowFinalizer() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override {
@ -702,9 +703,16 @@ public:
}
};
} // end anonymous namespace
INITIALIZE_PASS_BEGIN(R600ControlFlowFinalizer, DEBUG_TYPE,
"R600 Control Flow Finalizer", false, false)
INITIALIZE_PASS_END(R600ControlFlowFinalizer, DEBUG_TYPE,
"R600 Control Flow Finalizer", false, false)
char R600ControlFlowFinalizer::ID = 0;
} // end anonymous namespace
char &llvm::R600ControlFlowFinalizerID = R600ControlFlowFinalizer::ID;
FunctionPass *llvm::createR600ControlFlowFinalizer() {
return new R600ControlFlowFinalizer();

12
llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
View File

@ -26,17 +26,20 @@
using namespace llvm;
#define DEBUG_TYPE "r600-expand-special-instrs"
namespace {
class R600ExpandSpecialInstrsPass : public MachineFunctionPass {
private:
static char ID;
const R600InstrInfo *TII;
void SetFlagInNewMI(MachineInstr *NewMI, const MachineInstr *OldMI,
unsigned Op);
public:
static char ID;
R600ExpandSpecialInstrsPass() : MachineFunctionPass(ID),
TII(nullptr) { }
@ -49,8 +52,15 @@ public:
} // End anonymous namespace
INITIALIZE_PASS_BEGIN(R600ExpandSpecialInstrsPass, DEBUG_TYPE,
"R600 Expand Special Instrs", false, false)
INITIALIZE_PASS_END(R600ExpandSpecialInstrsPass, DEBUG_TYPE,
"R600ExpandSpecialInstrs", false, false)
char R600ExpandSpecialInstrsPass::ID = 0;
char &llvm::R600ExpandSpecialInstrsPassID = R600ExpandSpecialInstrsPass::ID;
FunctionPass *llvm::createR600ExpandSpecialInstrsPass() {
return new R600ExpandSpecialInstrsPass();
}

7
llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
View File

@ -145,8 +145,15 @@ public:
} // end anonymous namespace.
INITIALIZE_PASS_BEGIN(R600VectorRegMerger, DEBUG_TYPE,
"R600 Vector Reg Merger", false, false)
INITIALIZE_PASS_END(R600VectorRegMerger, DEBUG_TYPE,
"R600 Vector Reg Merger", false, false)
char R600VectorRegMerger::ID = 0;
char &llvm::R600VectorRegMergerID = R600VectorRegMerger::ID;
bool R600VectorRegMerger::canSwizzle(const MachineInstr &MI)
const {
if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST)

10
llvm/lib/Target/AMDGPU/R600Packetizer.cpp
View File

@ -51,7 +51,6 @@ public:
bool runOnMachineFunction(MachineFunction &Fn) override;
};
char R600Packetizer::ID = 0;
class R600PacketizerList : public VLIWPacketizerList {
private:
@ -404,6 +403,15 @@ bool R600Packetizer::runOnMachineFunction(MachineFunction &Fn) {
} // end anonymous namespace
INITIALIZE_PASS_BEGIN(R600Packetizer, DEBUG_TYPE,
"R600 Packetizer", false, false)
INITIALIZE_PASS_END(R600Packetizer, DEBUG_TYPE,
"R600 Packetizer", false, false)
char R600Packetizer::ID = 0;
char &llvm::R600PacketizerID = R600Packetizer::ID;
llvm::FunctionPass *llvm::createR600Packetizer() {
return new R600Packetizer();
}