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Have 'optnone' respect the -fast-isel=false option. 

This is primarily useful for debugging optnone v. ISel issues.

Differential Revision: http://reviews.llvm.org/D14792

llvm-svn: 254335
This commit is contained in:
Paul Robinson 2015-11-30 21:56:16 +00:00
parent eb9c7056f0
commit a2550a6da3
6 changed files with 24 additions and 10 deletions
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6
llvm/docs/LangRef.rst
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@ -1289,9 +1289,9 @@ example:
that are recognized by LLVM to handle asynchronous exceptions, such
as SEH, will still provide their implementation defined semantics.
``optnone``
This function attribute indicates that the function is not optimized
by any optimization or code generator passes with the
exception of interprocedural optimization passes.
This function attribute indicates that most optimization passes will skip
this function, with the exception of interprocedural optimization passes.
Code generation defaults to the "fast" instruction selector.
This attribute cannot be used together with the ``alwaysinline``
attribute; this attribute is also incompatible
with the ``minsize`` attribute and the ``optsize`` attribute.

3
llvm/include/llvm/Target/TargetMachine.h
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@ -102,6 +102,7 @@ protected: // Can only create subclasses.
const MCSubtargetInfo *STI;
unsigned RequireStructuredCFG : 1;
unsigned O0WantsFastISel : 1;
/// This API is here to support the C API, deprecated in 3.7 release.
/// This should never be used outside of legacy existing client.
@ -190,6 +191,8 @@ public:
void setOptLevel(CodeGenOpt::Level Level) const;
void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
bool getO0WantsFastISel() { return O0WantsFastISel; }
void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }

3
llvm/lib/CodeGen/LLVMTargetMachine.cpp
View File

@ -125,9 +125,10 @@ addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM,
PM.add(new MachineFunctionAnalysis(*TM, MFInitializer));
// Enable FastISel with -fast, but allow that to be overridden.
TM->setO0WantsFastISel(EnableFastISelOption != cl::BOU_FALSE);
if (EnableFastISelOption == cl::BOU_TRUE ||
(TM->getOptLevel() == CodeGenOpt::None &&
EnableFastISelOption != cl::BOU_FALSE))
TM->getO0WantsFastISel()))
TM->setFastISel(true);
// Ask the target for an isel.

10
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -264,13 +264,17 @@ namespace llvm {
return;
IS.OptLevel = NewOptLevel;
IS.TM.setOptLevel(NewOptLevel);
SavedFastISel = IS.TM.Options.EnableFastISel;
if (NewOptLevel == CodeGenOpt::None)
IS.TM.setFastISel(true);
DEBUG(dbgs() << "\nChanging optimization level for Function "
<< IS.MF->getFunction()->getName() << "\n");
DEBUG(dbgs() << "\tBefore: -O" << SavedOptLevel
<< " ; After: -O" << NewOptLevel << "\n");
SavedFastISel = IS.TM.Options.EnableFastISel;
if (NewOptLevel == CodeGenOpt::None) {
IS.TM.setFastISel(IS.TM.getO0WantsFastISel());
DEBUG(dbgs() << "\tFastISel is "
<< (IS.TM.Options.EnableFastISel ? "enabled" : "disabled")
<< "\n");
}
}
~OptLevelChanger() {

4
llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll
View File

@ -1,5 +1,5 @@
; Check that register scavenging spill slot is close to $fp.
; RUN: llc -march=mipsel -O0 -fast-isel=false < %s | FileCheck %s
; RUN: llc -march=mipsel -O0 < %s | FileCheck %s
; CHECK: sw ${{.*}}, 8($sp)
; CHECK: lw ${{.*}}, 8($sp)
@ -31,4 +31,4 @@ entry:
ret i32 0
}
attributes #0 = { noinline optnone "no-frame-pointer-elim"="true" }
attributes #0 = { noinline "no-frame-pointer-elim"="true" }

8
llvm/test/Feature/optnone-llc.ll
View File

@ -3,11 +3,13 @@
; RUN: llc -O2 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-Ox
; RUN: llc -O3 -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-Ox
; RUN: llc -misched-postra -debug %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=LLC-MORE
; RUN: llc -O1 -debug-only=isel %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=FAST
; RUN: llc -O1 -debug-only=isel -fast-isel=false %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=NOFAST
; REQUIRES: asserts, default_triple
; This test verifies that we don't run Machine Function optimizations
; on optnone functions.
; on optnone functions, and that we can turn off FastISel.
; Function Attrs: noinline optnone
define i32 @_Z3fooi(i32 %x) #0 {
@ -52,3 +54,7 @@ attributes #0 = { optnone noinline }
; Alternate post-RA scheduler.
; LLC-MORE: Skipping pass 'PostRA Machine Instruction Scheduler'
; Selectively disable FastISel for optnone functions.
; FAST: FastISel is enabled
; NOFAST: FastISel is disabled