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Fix issues that the local allocator has dealing with instructions that implicitly use ST(0) 

llvm-svn: 12855
This commit is contained in:
Chris Lattner 2004-04-12 03:02:48 +00:00
parent 2e2b0ceab9
commit a24f986333
3 changed files with 14 additions and 9 deletions
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10
llvm/lib/Target/X86/FloatingPoint.cpp
View File

@ -494,42 +494,42 @@ void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) {
// ForwardST0Table - Map: A = B op C into: ST(0) = ST(0) op ST(i)
static const TableEntry ForwardST0Table[] = {
{ X86::FUCOMIr, X86::FUCOMIr },
{ X86::FpADD , X86::FADDST0r },
{ X86::FpDIV , X86::FDIVST0r },
{ X86::FpMUL , X86::FMULST0r },
{ X86::FpSUB , X86::FSUBST0r },
{ X86::FpUCOM , X86::FUCOMr },
{ X86::FpUCOMI, X86::FUCOMIr },
};
// ReverseST0Table - Map: A = B op C into: ST(0) = ST(i) op ST(0)
static const TableEntry ReverseST0Table[] = {
{ X86::FUCOMIr, ~0 },
{ X86::FpADD , X86::FADDST0r }, // commutative
{ X86::FpDIV , X86::FDIVRST0r },
{ X86::FpMUL , X86::FMULST0r }, // commutative
{ X86::FpSUB , X86::FSUBRST0r },
{ X86::FpUCOM , ~0 },
{ X86::FpUCOMI, ~0 },
};
// ForwardSTiTable - Map: A = B op C into: ST(i) = ST(0) op ST(i)
static const TableEntry ForwardSTiTable[] = {
{ X86::FUCOMIr, X86::FUCOMIr },
{ X86::FpADD , X86::FADDrST0 }, // commutative
{ X86::FpDIV , X86::FDIVRrST0 },
{ X86::FpMUL , X86::FMULrST0 }, // commutative
{ X86::FpSUB , X86::FSUBRrST0 },
{ X86::FpUCOM , X86::FUCOMr },
{ X86::FpUCOMI, X86::FUCOMIr },
};
// ReverseSTiTable - Map: A = B op C into: ST(i) = ST(i) op ST(0)
static const TableEntry ReverseSTiTable[] = {
{ X86::FUCOMIr, ~0 },
{ X86::FpADD , X86::FADDrST0 },
{ X86::FpDIV , X86::FDIVrST0 },
{ X86::FpMUL , X86::FMULrST0 },
{ X86::FpSUB , X86::FSUBrST0 },
{ X86::FpUCOM , ~0 },
{ X86::FpUCOMI, ~0 },
};
@ -553,7 +553,7 @@ void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) {
unsigned NumOperands = MI->getNumOperands();
bool isCompare = MI->getOpcode() == X86::FpUCOM ||
MI->getOpcode() == X86::FUCOMIr;
MI->getOpcode() == X86::FpUCOMI;
assert((NumOperands == 3 || (NumOperands == 2 && isCompare)) &&
"Illegal TwoArgFP instruction!");
unsigned Dest = getFPReg(MI->getOperand(0));

6
llvm/lib/Target/X86/InstSelectSimple.cpp
View File

@ -934,7 +934,7 @@ unsigned ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,
BuildMI(*MBB, IP, X86::FNSTSW8r, 0);
BuildMI(*MBB, IP, X86::SAHF, 1);
} else {
BuildMI(*MBB, IP, X86::FUCOMIr, 2).addReg(Op0r).addReg(Op1r);
BuildMI(*MBB, IP, X86::FpUCOMI, 2).addReg(Op0r).addReg(Op1r);
}
break;
@ -1774,6 +1774,10 @@ static bool isSafeToFoldLoadIntoInstruction(LoadInst &LI, Instruction &User) {
case Instruction::Call:
case Instruction::Invoke:
return false;
case Instruction::Load:
if (cast<LoadInst>(It)->isVolatile() && LI.isVolatile())
return false;
break;
}
}
return true;

7
llvm/lib/Target/X86/X86InstrInfo.td
View File

@ -722,7 +722,8 @@ def FpSUB : FPI<"FSUB", 0, Pseudo, TwoArgFP>; // f1 = fsub f2, f3
def FpMUL : FPI<"FMUL", 0, Pseudo, TwoArgFP>; // f1 = fmul f2, f3
def FpDIV : FPI<"FDIV", 0, Pseudo, TwoArgFP>; // f1 = fdiv f2, f3
def FpUCOM : FPI<"FUCOM", 0, Pseudo, TwoArgFP>; // FPSW = fucom f1, f2
def FpUCOM : FPI<"FUCOM", 0, Pseudo, TwoArgFP>; // FPSW = fucom f1, f2
def FpUCOMI : FPI<"FUCOMI", 0, Pseudo, TwoArgFP>; // CC = fucomi f1, f2
def FpGETRESULT : FPI<"FGETRESULT",0, Pseudo, SpecialFP>; // FPR = ST(0)
def FpSETRESULT : FPI<"FSETRESULT",0, Pseudo, SpecialFP>; // ST(0) = FPR
@ -852,8 +853,8 @@ def FUCOMPr : I<"fucomp" , 0xE8, AddRegFrm>, DD, Imp<[ST0],[]>; // FPSW = com
def FUCOMPPr : I<"fucompp", 0xE9, RawFrm >, DA, Imp<[ST0],[]>; // compare ST(0) with ST(1), pop, pop
let printImplicitUsesBefore = 1 in {
def FUCOMIr : FPI<"fucomi", 0xE8, AddRegFrm, TwoArgFP>, DB, Imp<[ST0],[]>; // CC = compare ST(0) with ST(i)
def FUCOMIPr : I<"fucomip" , 0xE8, AddRegFrm>, DF, Imp<[ST0],[]>; // CC = compare ST(0) with ST(i), pop
def FUCOMIr : I<"fucomi" , 0xE8, AddRegFrm>, DB, Imp<[ST0],[]>; // CC = compare ST(0) with ST(i)
def FUCOMIPr : I<"fucomip", 0xE8, AddRegFrm>, DF, Imp<[ST0],[]>; // CC = compare ST(0) with ST(i), pop
}
// Floating point flag ops