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Fix ARMTargetLowering::isLegalAddImmediate to consider thumb encodings. 

Based on Evan's suggestion without a commitable test.

llvm-svn: 160441
This commit is contained in:
Andrew Trick 2012-07-18 18:34:27 +00:00
parent bc325168c3
commit a22cdb713b
1 changed files with 11 additions and 4 deletions
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15
llvm/lib/Target/ARM/ARMISelLowering.cpp
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@ -9046,12 +9046,19 @@ bool ARMTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
return Imm >= 0 && Imm <= 255;
}
/// isLegalAddImmediate - Return true if the specified immediate is legal
/// add immediate, that is the target has add instructions which can add
/// a register with the immediate without having to materialize the
/// isLegalAddImmediate - Return true if the specified immediate is a legal add
/// *or sub* immediate, that is the target has add or sub instructions which can
/// add a register with the immediate without having to materialize the
/// immediate into a register.
bool ARMTargetLowering::isLegalAddImmediate(int64_t Imm) const {
return ARM_AM::getSOImmVal(Imm) != -1;
// Same encoding for add/sub, just flip the sign.
int64_t AbsImm = llvm::abs64(Imm);
if (!Subtarget->isThumb())
return ARM_AM::getSOImmVal(AbsImm) != -1;
if (Subtarget->isThumb2())
return ARM_AM::getT2SOImmVal(AbsImm) != -1;
// Thumb1 only has 8-bit unsigned immediate.
return AbsImm >= 0 && AbsImm <= 255;
}
static bool getARMIndexedAddressParts(SDNode *Ptr, EVT VT,