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Ignore special ARM allocation hints for unexpected register classes. 

Add an assertion to linear scan to prevent it from allocating registers outside
the register class.

<rdar://problem/9183021>

llvm-svn: 128254
This commit is contained in:
Jakob Stoklund Olesen 2011-03-25 01:48:18 +00:00
parent d469321186
commit a1e3156ebd
2 changed files with 5 additions and 0 deletions
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1
llvm/lib/CodeGen/RegAllocLinearScan.cpp
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@ -1110,6 +1110,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) {
// list. // list.
if (physReg) { if (physReg) {
DEBUG(dbgs() << tri_->getName(physReg) << '\n'); DEBUG(dbgs() << tri_->getName(physReg) << '\n');
assert(RC->contains(physReg) && "Invalid candidate");
vrm_->assignVirt2Phys(cur->reg, physReg); vrm_->assignVirt2Phys(cur->reg, physReg);
addRegUse(physReg); addRegUse(physReg);
active_.push_back(std::make_pair(cur, cur->begin())); active_.push_back(std::make_pair(cur, cur->begin()));

4
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
View File

@ -448,6 +448,10 @@ ARMBaseRegisterInfo::getAllocationOrder(const TargetRegisterClass *RC,
ARM::R0, ARM::R2, ARM::R10,ARM::R12,ARM::LR, ARM::R4, ARM::R6, ARM::R8 ARM::R0, ARM::R2, ARM::R10,ARM::R12,ARM::LR, ARM::R4, ARM::R6, ARM::R8
}; };
// We only support even/odd hints for GPR and rGPR.
if (RC != ARM::GPRRegisterClass && RC != ARM::rGPRRegisterClass)
return std::make_pair(RC->allocation_order_begin(MF),
RC->allocation_order_end(MF));
if (HintType == ARMRI::RegPairEven) { if (HintType == ARMRI::RegPairEven) {
if (isPhysicalRegister(HintReg) && getRegisterPairEven(HintReg, MF) == 0) if (isPhysicalRegister(HintReg) && getRegisterPairEven(HintReg, MF) == 0)