Preserve <undef> flags in ARMExpandPseudo.

This probably mostly shows up in bugpoint-generated code.

llvm-svn: 158527
This commit is contained in:
Jakob Stoklund Olesen 2012-06-15 17:46:54 +00:00
parent 5767ad727c
commit a15a224db0
2 changed files with 14 additions and 5 deletions

View File

@ -459,22 +459,23 @@ void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) {
MIB.addOperand(MI.getOperand(OpIdx++)); MIB.addOperand(MI.getOperand(OpIdx++));
bool SrcIsKill = MI.getOperand(OpIdx).isKill(); bool SrcIsKill = MI.getOperand(OpIdx).isKill();
bool SrcIsUndef = MI.getOperand(OpIdx).isUndef();
unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
unsigned D0, D1, D2, D3; unsigned D0, D1, D2, D3;
GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3); GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3);
MIB.addReg(D0); MIB.addReg(D0, getUndefRegState(SrcIsUndef));
if (NumRegs > 1 && TableEntry->copyAllListRegs) if (NumRegs > 1 && TableEntry->copyAllListRegs)
MIB.addReg(D1); MIB.addReg(D1, getUndefRegState(SrcIsUndef));
if (NumRegs > 2 && TableEntry->copyAllListRegs) if (NumRegs > 2 && TableEntry->copyAllListRegs)
MIB.addReg(D2); MIB.addReg(D2, getUndefRegState(SrcIsUndef));
if (NumRegs > 3 && TableEntry->copyAllListRegs) if (NumRegs > 3 && TableEntry->copyAllListRegs)
MIB.addReg(D3); MIB.addReg(D3, getUndefRegState(SrcIsUndef));
// Copy the predicate operands. // Copy the predicate operands.
MIB.addOperand(MI.getOperand(OpIdx++)); MIB.addOperand(MI.getOperand(OpIdx++));
MIB.addOperand(MI.getOperand(OpIdx++)); MIB.addOperand(MI.getOperand(OpIdx++));
if (SrcIsKill) // Add an implicit kill for the super-reg. if (SrcIsKill && !SrcIsUndef) // Add an implicit kill for the super-reg.
MIB->addRegisterKilled(SrcReg, TRI, true); MIB->addRegisterKilled(SrcReg, TRI, true);
TransferImpOps(MI, MIB, MIB); TransferImpOps(MI, MIB, MIB);

View File

@ -60,8 +60,16 @@ for.end: ; preds = %entry
ret void ret void
} }
; Check that pseudo-expansion preserves <undef> flags.
define void @foo3(i8* %p) nounwind ssp {
entry:
tail call void @llvm.arm.neon.vst2.v4f32(i8* %p, <4 x float> undef, <4 x float> undef, i32 4)
ret void
}
declare arm_aapcs_vfpcc void @bar(i8*, float, float, float) declare arm_aapcs_vfpcc void @bar(i8*, float, float, float)
declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind
declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind
!0 = metadata !{metadata !"omnipotent char", metadata !1} !0 = metadata !{metadata !"omnipotent char", metadata !1}
!1 = metadata !{metadata !"Simple C/C++ TBAA", null} !1 = metadata !{metadata !"Simple C/C++ TBAA", null}