[Hexagon] PC-relative offsets are relative to packet start rather than the offset of the relocation. Set relocation addend and check it's correct in the ELF.
llvm-svn: 239769
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@ -342,6 +342,36 @@ static Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI,
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return LastTargetFixupKind;
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}
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namespace llvm {
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extern const MCInstrDesc HexagonInsts[];
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}
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namespace {
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bool isPCRel (unsigned Kind) {
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switch(Kind){
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case fixup_Hexagon_B22_PCREL:
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case fixup_Hexagon_B15_PCREL:
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case fixup_Hexagon_B7_PCREL:
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case fixup_Hexagon_B13_PCREL:
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case fixup_Hexagon_B9_PCREL:
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case fixup_Hexagon_B32_PCREL_X:
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case fixup_Hexagon_B22_PCREL_X:
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case fixup_Hexagon_B15_PCREL_X:
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case fixup_Hexagon_B13_PCREL_X:
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case fixup_Hexagon_B9_PCREL_X:
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case fixup_Hexagon_B7_PCREL_X:
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case fixup_Hexagon_32_PCREL:
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case fixup_Hexagon_PLT_B22_PCREL:
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case fixup_Hexagon_GD_PLT_B22_PCREL:
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case fixup_Hexagon_LD_PLT_B22_PCREL:
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case fixup_Hexagon_6_PCREL_X:
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return true;
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default:
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return false;
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}
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}
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}
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unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI,
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const MCOperand &MO,
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const MCExpr *ME,
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@ -363,7 +393,7 @@ unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI,
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Res = getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getLHS(), Fixups, STI);
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Res +=
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getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getRHS(), Fixups, STI);
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return Res;
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return 0;
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}
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assert(MK == MCExpr::SymbolRef);
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@ -662,8 +692,13 @@ unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI,
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break;
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}
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MCFixup fixup =
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MCFixup::create(*Addend, MO.getExpr(), MCFixupKind(FixupKind));
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MCExpr const *FixupExpression = (*Addend > 0 && isPCRel(FixupKind)) ?
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MCBinaryExpr::createAdd(MO.getExpr(),
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MCConstantExpr::create(*Addend, MCT), MCT) :
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MO.getExpr();
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MCFixup fixup = MCFixup::create(*Addend, FixupExpression,
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MCFixupKind(FixupKind), MI.getLoc());
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Fixups.push_back(fixup);
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// All of the information is in the fixup.
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return (0);
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@ -0,0 +1,10 @@
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; RUN: llc -march=hexagon -filetype=obj -o - < %s | llvm-objdump -d -r - | FileCheck %s
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declare void @bar(i32);
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define void @foo(i32 %a) {
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%b = mul i32 %a, 3
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call void @bar(i32 %b)
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ret void
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}
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; CHECK: 0x8 R_HEX_B22_PCREL - 0x4
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