GlobalISel: Use the correct types when translating landingpad instructions
There was a bug here where we were using p0 instead of s32 for the selector type in the landingpad. Instead of hardcoding these types we should get the types from the landingpad instruction directly. Note that we replicate an assert from SDAG here to only support two-valued landingpads. llvm-svn: 292995
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@ -701,22 +701,26 @@ bool IRTranslator::translateLandingPad(const User &U,
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MIRBuilder.buildInstr(TargetOpcode::EH_LABEL)
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.addSym(MF->addLandingPad(&MBB));
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SmallVector<LLT, 2> Tys;
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for (Type *Ty : cast<StructType>(LP.getType())->elements())
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Tys.push_back(LLT{*Ty, *DL});
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assert(Tys.size() == 2 && "Only two-valued landingpads are supported");
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// Mark exception register as live in.
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SmallVector<unsigned, 2> Regs;
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SmallVector<uint64_t, 2> Offsets;
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LLT p0 = LLT::pointer(0, DL->getPointerSizeInBits());
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if (unsigned Reg = TLI.getExceptionPointerRegister(PersonalityFn)) {
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unsigned VReg = MRI->createGenericVirtualRegister(p0);
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unsigned VReg = MRI->createGenericVirtualRegister(Tys[0]);
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MIRBuilder.buildCopy(VReg, Reg);
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Regs.push_back(VReg);
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Offsets.push_back(0);
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}
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if (unsigned Reg = TLI.getExceptionSelectorRegister(PersonalityFn)) {
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unsigned VReg = MRI->createGenericVirtualRegister(p0);
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unsigned VReg = MRI->createGenericVirtualRegister(Tys[1]);
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MIRBuilder.buildCopy(VReg, Reg);
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Regs.push_back(VReg);
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Offsets.push_back(p0.getSizeInBits());
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Offsets.push_back(Tys[0].getSizeInBits());
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}
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MIRBuilder.buildSequence(getOrCreateVReg(LP), Regs, Offsets);
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@ -19,8 +19,8 @@ declare i32 @llvm.eh.typeid.for(i8*)
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; CHECK: [[BAD]] (landing-pad):
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; CHECK: EH_LABEL
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; CHECK: [[PTR:%[0-9]+]](p0) = COPY %x0
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; CHECK: [[SEL:%[0-9]+]](p0) = COPY %x1
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; CHECK: [[PTR_SEL:%[0-9]+]](s128) = G_SEQUENCE [[PTR]](p0), 0, [[SEL]](p0), 64
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; CHECK: [[SEL:%[0-9]+]](s32) = COPY %x1
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; CHECK: [[PTR_SEL:%[0-9]+]](s128) = G_SEQUENCE [[PTR]](p0), 0, [[SEL]](s32), 64
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; CHECK: [[PTR_RET:%[0-9]+]](s64), [[SEL_RET:%[0-9]+]](s32) = G_EXTRACT [[PTR_SEL]](s128), 0, 64
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; CHECK: %x0 = COPY [[PTR_RET]]
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; CHECK: %w1 = COPY [[SEL_RET]]
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@ -0,0 +1,44 @@
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; RUN: llc -O0 -mtriple=aarch64-apple-ios -global-isel -stop-after=legalizer %s -o - | FileCheck %s
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@_ZTIi = external global i8*
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declare i32 @foo(i32)
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declare i32 @__gxx_personality_v0(...)
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declare i32 @llvm.eh.typeid.for(i8*)
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declare void @_Unwind_Resume(i8*)
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; CHECK: name: bar
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; CHECK: body:
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; CHECK-NEXT: bb.1 (%ir-block.0):
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; CHECK: successors: %{{bb.[0-9]+.continue.*}}%[[LP:bb.[0-9]+.cleanup]]
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; CHECK: [[LP]] (landing-pad):
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; CHECK: EH_LABEL
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; CHECK: [[PTR:%[0-9]+]](p0) = COPY %x0
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; CHECK: [[SEL:%[0-9]+]](s32) = COPY %x1
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; CHECK-NOT: G_SEQUENCE
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; CHECK-NOT: G_EXTRACT
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; CHECK: G_STORE [[PTR]](p0), {{%[0-9]+}}(p0)
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; CHECK: G_STORE [[SEL]](s32), {{%[0-9]+}}(p0)
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define void @bar() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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%exn.slot = alloca i8*
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%ehselector.slot = alloca i32
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%1 = invoke i32 @foo(i32 42) to label %continue unwind label %cleanup
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cleanup:
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%2 = landingpad { i8*, i32 } cleanup
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%3 = extractvalue { i8*, i32 } %2, 0
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store i8* %3, i8** %exn.slot, align 8
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%4 = extractvalue { i8*, i32 } %2, 1
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store i32 %4, i32* %ehselector.slot, align 4
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br label %eh.resume
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continue:
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ret void
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eh.resume:
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%exn = load i8*, i8** %exn.slot, align 8
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call void @_Unwind_Resume(i8* %exn)
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unreachable
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}
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