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AArch64: disallow x30 & x29 as the destination for indirect tail calls 

As Ana Pazos pointed out, these have to be restored to their incoming values
before a function returns; i.e. before the tail call. So they can't be used
correctly as the destination register.

llvm-svn: 210525
This commit is contained in:
Tim Northover 2014-06-10 10:50:24 +00:00
parent 7b9f86da5d
commit 9ffd0b020f
2 changed files with 15 additions and 1 deletions
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2
llvm/lib/Target/AArch64/AArch64RegisterInfo.td
View File

@ -175,7 +175,7 @@ def GPR64all : RegisterClass<"AArch64", [i64], 64, (add GPR64common, XZR, SP)>;
// This is for indirect tail calls to store the address of the destination.
def tcGPR64 : RegisterClass<"AArch64", [i64], 64, (sub GPR64common, X19, X20, X21,
X22, X23, X24, X25, X26,
X27, X28)>;
X27, X28, FP, LR)>;
// GPR register classes for post increment amount of vector load/store that
// has alternate printing when Rm=31 and prints a constant immediate value

14
llvm/test/CodeGen/AArch64/regress-tail-livereg.ll
View File

@ -17,3 +17,17 @@ define void @foo() {
; CHECK: br {{x([0-79]|1[0-8])}}
ret void
}
; No matter how tempting it is, LLVM should not use x30 since that'll be
; restored to its incoming value before the "br".
define void @test_x30_tail() {
; CHECK-LABEL: test_x30_tail:
; CHECK: mov [[DEST:x[0-9]+]], x30
; CHECK: br [[DEST]]
%addr = call i8* @llvm.returnaddress(i32 0)
%faddr = bitcast i8* %addr to void()*
tail call void %faddr()
ret void
}
declare i8* @llvm.returnaddress(i32)