AArch64: disallow x30 & x29 as the destination for indirect tail calls
As Ana Pazos pointed out, these have to be restored to their incoming values before a function returns; i.e. before the tail call. So they can't be used correctly as the destination register. llvm-svn: 210525
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@ -175,7 +175,7 @@ def GPR64all : RegisterClass<"AArch64", [i64], 64, (add GPR64common, XZR, SP)>;
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// This is for indirect tail calls to store the address of the destination.
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// This is for indirect tail calls to store the address of the destination.
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def tcGPR64 : RegisterClass<"AArch64", [i64], 64, (sub GPR64common, X19, X20, X21,
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def tcGPR64 : RegisterClass<"AArch64", [i64], 64, (sub GPR64common, X19, X20, X21,
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X22, X23, X24, X25, X26,
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X22, X23, X24, X25, X26,
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X27, X28)>;
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X27, X28, FP, LR)>;
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// GPR register classes for post increment amount of vector load/store that
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// GPR register classes for post increment amount of vector load/store that
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// has alternate printing when Rm=31 and prints a constant immediate value
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// has alternate printing when Rm=31 and prints a constant immediate value
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@ -17,3 +17,17 @@ define void @foo() {
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; CHECK: br {{x([0-79]|1[0-8])}}
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; CHECK: br {{x([0-79]|1[0-8])}}
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ret void
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ret void
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}
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}
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; No matter how tempting it is, LLVM should not use x30 since that'll be
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; restored to its incoming value before the "br".
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define void @test_x30_tail() {
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; CHECK-LABEL: test_x30_tail:
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; CHECK: mov [[DEST:x[0-9]+]], x30
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; CHECK: br [[DEST]]
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%addr = call i8* @llvm.returnaddress(i32 0)
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%faddr = bitcast i8* %addr to void()*
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tail call void %faddr()
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ret void
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}
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declare i8* @llvm.returnaddress(i32)
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