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[AArch64] Add workaround for Cortex-A53 erratum (835769) 

Some early revisions of the Cortex-A53 have an erratum (835769) whereby it is
possible for a 64-bit multiply-accumulate instruction in AArch64 state to
generate an incorrect result.  The details are quite complex and hard to
determine statically, since branches in the code may exist in some
circumstances, but all cases end with a memory (load, store, or prefetch)
instruction followed immediately by the multiply-accumulate operation.

The safest work-around for this issue is to make the compiler avoid emitting
multiply-accumulate instructions immediately after memory instructions and the
simplest way to do this is to insert a NOP.

This patch implements clang options to enable this workaround in the backend.

The work-around code generation is not enabled by default.

llvm-svn: 219604
This commit is contained in:
Bradley Smith 2014-10-13 10:16:06 +00:00
parent f2a801d8ac
commit 9ff64332a0
4 changed files with 44 additions and 0 deletions
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7
clang/include/clang/Driver/Options.td
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@ -1169,6 +1169,13 @@ def mno_long_calls : Flag<["-"], "mno-long-calls">, Group<m_arm_Features_Group>,
def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group<m_aarch64_Features_Group>,
HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">;
def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
Group<m_aarch64_Features_Group>,
HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">;
def mno_fix_cortex_a53_835769 : Flag<["-"], "mno-fix-cortex-a53-835769">,
Group<m_aarch64_Features_Group>,
HelpText<"Don't workaround Cortex-A53 erratum 835769 (AArch64 only)">;
def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>;
def mno_vsx : Flag<["-"], "mno-vsx">, Group<m_ppc_Features_Group>;
def mpower8_vector : Flag<["-"], "mpower8-vector">,

9
clang/lib/Driver/Tools.cpp
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@ -913,6 +913,15 @@ void Clang::AddAArch64TargetArgs(const ArgList &Args,
CmdArgs.push_back("-aarch64-no-strict-align");
}
if (Arg *A = Args.getLastArg(options::OPT_mfix_cortex_a53_835769,
options::OPT_mno_fix_cortex_a53_835769)) {
CmdArgs.push_back("-backend-option");
if (A->getOption().matches(options::OPT_mfix_cortex_a53_835769))
CmdArgs.push_back("-aarch64-fix-cortex-a53-835769=1");
else
CmdArgs.push_back("-aarch64-fix-cortex-a53-835769=0");
}
// Setting -mno-global-merge disables the codegen global merge pass. Setting
// -mglobal-merge has no effect as the pass is enabled by default.
if (Arg *A = Args.getLastArg(options::OPT_mglobal_merge,

19
clang/test/Driver/aarch64-fix-cortex-a53-835769-cg.c Normal file
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@ -0,0 +1,19 @@
// REQUIRES: aarch64-registered-target
// RUN: %clang -O3 -target aarch64-linux-eabi %s -S -o- \
// RUN: | FileCheck --check-prefix=CHECK-NO --check-prefix=CHECK %s
// RUN: %clang -O3 -target aarch64-linux-eabi -mfix-cortex-a53-835769 %s -S -o- 2>&1 \
// RUN: | FileCheck --check-prefix=CHECK-YES --check-prefix=CHECK %s
// RUN: %clang -O3 -target aarch64-linux-eabi -mno-fix-cortex-a53-835769 %s -S -o- 2>&1 \
// RUN: | FileCheck --check-prefix=CHECK-NO --check-prefix=CHECK %s
#include <stdint.h>
int64_t f_load_madd_64(int64_t a, int64_t b, int64_t *c) {
int64_t result = a+b*(*c);
return result;
}
// CHECK: ldr
// CHECK-YES-NEXT: nop
// CHECK-NO-NEXT-NOT: nop
// CHECK-NEXT: madd

9
clang/test/Driver/aarch64-fix-cortex-a53-835769.c Normal file
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@ -0,0 +1,9 @@
// RUN: %clang -target aarch64-linux-eabi %s -### 2>&1 \
// RUN: | FileCheck --check-prefix=CHECK-DEF %s
// RUN: %clang -target aarch64-linux-eabi -mfix-cortex-a53-835769 %s -### 2>&1 \
// RUN: | FileCheck --check-prefix=CHECK-YES %s
// RUN: %clang -target aarch64-linux-eabi -mno-fix-cortex-a53-835769 %s -### 2>&1 \
// RUN: | FileCheck --check-prefix=CHECK-NO %s
// CHECK-DEF-NOT: "-backend-option" "-aarch64-fix-cortex-a53-835769"
// CHECK-YES: "-backend-option" "-aarch64-fix-cortex-a53-835769=1"
// CHECK-NO: "-backend-option" "-aarch64-fix-cortex-a53-835769=0"