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MachineVerifier: Fix assert on implicit virtreg use 

If the liveness of a physical register was invalid, this
was attempting to iterate the subregisters of all register
uses of the instruction, which would assert when it
encountered an implicit virtual register operand.

llvm-svn: 340763
This commit is contained in:
Matt Arsenault 2018-08-27 17:40:09 +00:00
parent 937003cf22
commit 9eb3dda0b2
2 changed files with 25 additions and 2 deletions
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6
llvm/lib/CodeGen/MachineVerifier.cpp
View File

@ -1533,10 +1533,12 @@ void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) {
// get a report for its operand.
if (Bad) {
for (const MachineOperand &MOP : MI->uses()) {
if (!MOP.isReg())
if (!MOP.isReg() || !MOP.isImplicit())
continue;
if (!MOP.isImplicit())
if (!TargetRegisterInfo::isPhysicalRegister(MOP.getReg()))
continue;
for (MCSubRegIterator SubRegs(MOP.getReg(), TRI); SubRegs.isValid();
++SubRegs) {
if (*SubRegs == Reg) {

21
llvm/test/CodeGen/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir Normal file
View File

@ -0,0 +1,21 @@
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
# When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use.
# ERROR: *** Bad machine code: Using an undefined physical register ***
# ERROR: instruction: S_ENDPGM implicit %0:vgpr_32, implicit $vcc
# ERROR: operand 1: implicit $vcc
...
name: invalid_implicit_physreg_use_with_implicit_virtreg
tracksRegLiveness: true
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
S_ENDPGM implicit %0, implicit $vcc
...