Add support for the isLoad and isStore flags, needed by the instruction scheduler

llvm-svn: 16554
This commit is contained in:
Nate Begeman 2004-09-28 21:01:45 +00:00
parent 9b0dfa3c0d
commit 996ddbc98e
3 changed files with 6 additions and 0 deletions

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@ -71,6 +71,8 @@ namespace llvm {
bool isBranch;
bool isBarrier;
bool isCall;
bool isLoad;
bool isStore;
bool isTwoAddress;
bool isTerminator;
bool hasDelaySlot;

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@ -195,6 +195,8 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
isBranch = R->getValueAsBit("isBranch");
isBarrier = R->getValueAsBit("isBarrier");
isCall = R->getValueAsBit("isCall");
isLoad = R->getValueAsBit("isLoad");
isStore = R->getValueAsBit("isStore");
isTwoAddress = R->getValueAsBit("isTwoAddress");
isTerminator = R->getValueAsBit("isTerminator");
hasDelaySlot = R->getValueAsBit("hasDelaySlot");

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@ -113,6 +113,8 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
if (Inst.isBarrier) OS << "|M_BARRIER_FLAG";
if (Inst.hasDelaySlot) OS << "|M_DELAY_SLOT_FLAG";
if (Inst.isCall) OS << "|M_CALL_FLAG";
if (Inst.isLoad) OS << "|M_LOAD_FLAG";
if (Inst.isStore) OS << "|M_STORE_FLAG";
if (Inst.isTwoAddress) OS << "|M_2_ADDR_FLAG";
if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
OS << ", 0";